[PATCH 0/6] Add dwc3 usb3 DT node and various phy cleanup

[PATCH 0/6] Add dwc3 usb3 DT node and various phy cleanup

[Peter Griffin]

Hi,

This series primarily adds the dwc3 DT node which activates the usb3 controller on
the stih407-b2120 and stih410-b2120 platforms.

As part of getting this working I noticed some various errors with the DT
documentation examples for how we reference the PHYs which I've also fixed.

Whilst doing this I also noticed the miphy365 (found on stih415/6 platforms) could
now use the generic PHY constants which are used by miphy28, so I've updated this
driver and the DT docs accoringly..

Also miphy28lp driver isn't included in STI section of MAINTAINERS, so rectify that.

regards,

Peter.

Peter Griffin (6):
  phy: miphy365x: Use the generic phy type constants in
    dt-bindings/phy/phy.h
  ahci: st: Update the DT example for how to obtain the PHY.
  ARM: DT: STi: STiH407: Update picophyreset for the usb3 controllers
    usb2 phy
  ARM: DT: STi: STiH407: Add dwc3 usb3 DT node.
  usb: dwc3: dwc3-st: Update the DT example.
  MAINTAINERS: Add phy-miphy28lp.c to ARCH/STI architecture

 Documentation/devicetree/bindings/ata/ahci-st.txt  |  4 ++--
 .../devicetree/bindings/phy/phy-miphy365x.txt      |  8 +++----
 Documentation/devicetree/bindings/usb/dwc3-st.txt  |  4 ++--
 MAINTAINERS                                        |  1 +
 arch/arm/boot/dts/stih407-family.dtsi              | 28 +++++++++++++++++++++-
 arch/arm/boot/dts/stih416.dtsi                     |  4 ++--
 drivers/phy/phy-miphy365x.c                        | 14 +++++------
 include/dt-bindings/phy/phy-miphy365x.h            | 14 -----------
 8 files changed, 45 insertions(+), 32 deletions(-)
 delete mode 100644 include/dt-bindings/phy/phy-miphy365x.h

-- 
1.9.1

[PATCH 1/6] phy: miphy365x: Use the generic phy type constants in dt-bindings/phy/phy.h

[Peter Griffin]

Now there are generic phy type constants declared in phy.h, migrate over to
using them rather than defining our own. This change has been done as one
atomic commit to be bisectable.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
 Documentation/devicetree/bindings/phy/phy-miphy365x.txt |  8 ++++----
 arch/arm/boot/dts/stih416.dtsi                          |  4 ++--
 drivers/phy/phy-miphy365x.c                             | 14 +++++++-------
 include/dt-bindings/phy/phy-miphy365x.h                 | 14 --------------
 4 files changed, 13 insertions(+), 27 deletions(-)
 delete mode 100644 include/dt-bindings/phy/phy-miphy365x.h

diff --git a/Documentation/devicetree/bindings/phy/phy-miphy365x.txt b/Documentation/devicetree/bindings/phy/phy-miphy365x.txt
index 9802d5d..8772900 100644
--- a/Documentation/devicetree/bindings/phy/phy-miphy365x.txt
+++ b/Documentation/devicetree/bindings/phy/phy-miphy365x.txt
@@ -20,8 +20,8 @@ Required nodes	:  A sub-node is required for each channel the controller
 Required properties (port (child) node):
 - #phy-cells 	: Should be 1 (See second example)
 		  Cell after port phandle is device type from:
-			- MIPHY_TYPE_SATA
-			- MIPHY_TYPE_PCI
+			- PHY_TYPE_SATA
+			- PHY_TYPE_PCI
 - reg        	: Address and length of register sets for each device in
 		  "reg-names"
 - reg-names     : The names of the register addresses corresponding to the
@@ -68,10 +68,10 @@ property, containing a phandle to the phy port node and a device type.
 
 Example:
 
-#include <dt-bindings/phy/phy-miphy365x.h>
+#include <dt-bindings/phy/phy.h>
 
 	sata0: sata@fe380000 {
 		...
-		phys	  = <&phy_port0 MIPHY_TYPE_SATA>;
+		phys	  = <&phy_port0 PHY_TYPE_SATA>;
 		...
 	};
diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi
index ea28eba..eeb7afe 100644
--- a/arch/arm/boot/dts/stih416.dtsi
+++ b/arch/arm/boot/dts/stih416.dtsi
@@ -10,7 +10,7 @@
 #include "stih416-clock.dtsi"
 #include "stih416-pinctrl.dtsi"
 
-#include <dt-bindings/phy/phy-miphy365x.h>
+#include <dt-bindings/phy/phy.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/reset-controller/stih416-resets.h>
 / {
@@ -306,7 +306,7 @@
 			reg             = <0xfe380000 0x1000>;
 			interrupts      = <GIC_SPI 157 IRQ_TYPE_NONE>;
 			interrupt-names = "hostc";
-			phys	        = <&phy_port0 MIPHY_TYPE_SATA>;
+			phys	        = <&phy_port0 PHY_TYPE_SATA>;
 			phy-names       = "sata-phy";
 			resets	        = <&powerdown STIH416_SATA0_POWERDOWN>,
 					  <&softreset STIH416_SATA0_SOFTRESET>;
diff --git a/drivers/phy/phy-miphy365x.c b/drivers/phy/phy-miphy365x.c
index 6c80154..98bffbc 100644
--- a/drivers/phy/phy-miphy365x.c
+++ b/drivers/phy/phy-miphy365x.c
@@ -25,7 +25,7 @@
 #include <linux/mfd/syscon.h>
 #include <linux/regmap.h>
 
-#include <dt-bindings/phy/phy-miphy365x.h>
+#include <dt-bindings/phy/phy.h>
 
 #define HFC_TIMEOUT		100
 
@@ -176,7 +176,7 @@ static u8 rx_tx_spd[] = {
 static int miphy365x_set_path(struct miphy365x_phy *miphy_phy,
 			      struct miphy365x_dev *miphy_dev)
 {
-	bool sata = (miphy_phy->type == MIPHY_TYPE_SATA);
+	bool sata = (miphy_phy->type == PHY_TYPE_SATA);
 
 	return regmap_update_bits(miphy_dev->regmap,
 				  miphy_phy->ctrlreg,
@@ -430,7 +430,7 @@ static int miphy365x_init(struct phy *phy)
 	}
 
 	/* Initialise Miphy for PCIe or SATA */
-	if (miphy_phy->type == MIPHY_TYPE_PCIE)
+	if (miphy_phy->type == PHY_TYPE_PCIE)
 		ret = miphy365x_init_pcie_port(miphy_phy, miphy_dev);
 	else
 		ret = miphy365x_init_sata_port(miphy_phy, miphy_dev);
@@ -454,8 +454,8 @@ int miphy365x_get_addr(struct device *dev, struct miphy365x_phy *miphy_phy,
 		return ret;
 	}
 
-	if (!((!strncmp(name, "sata", 4) && type == MIPHY_TYPE_SATA) ||
-	      (!strncmp(name, "pcie", 4) && type == MIPHY_TYPE_PCIE)))
+	if (!((!strncmp(name, "sata", 4) && type == PHY_TYPE_SATA) ||
+	      (!strncmp(name, "pcie", 4) && type == PHY_TYPE_PCIE)))
 		return 0;
 
 	miphy_phy->base = of_iomap(phynode, index);
@@ -498,8 +498,8 @@ static struct phy *miphy365x_xlate(struct device *dev,
 
 	miphy_phy->type = args->args[0];
 
-	if (!(miphy_phy->type == MIPHY_TYPE_SATA ||
-	      miphy_phy->type == MIPHY_TYPE_PCIE)) {
+	if (!(miphy_phy->type == PHY_TYPE_SATA ||
+	      miphy_phy->type == PHY_TYPE_PCIE)) {
 		dev_err(dev, "Unsupported device type: %d\n", miphy_phy->type);
 		return ERR_PTR(-EINVAL);
 	}
diff --git a/include/dt-bindings/phy/phy-miphy365x.h b/include/dt-bindings/phy/phy-miphy365x.h
deleted file mode 100644
index 8ef8aba..0000000
--- a/include/dt-bindings/phy/phy-miphy365x.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * This header provides constants for the phy framework
- * based on the STMicroelectronics MiPHY365x.
- *
- * Author: Lee Jones <lee.jones@linaro.org>
- */
-#ifndef _DT_BINDINGS_PHY_MIPHY
-#define _DT_BINDINGS_PHY_MIPHY
-
-#define MIPHY_TYPE_SATA		1
-#define MIPHY_TYPE_PCIE		2
-#define MIPHY_TYPE_USB		3
-
-#endif /* _DT_BINDINGS_PHY_MIPHY */
-- 
1.9.1

Re: [PATCH 1/6] phy: miphy365x: Use the generic phy type constants in dt-bindings/phy/phy.h

[Rob Herring]

On Wed, Feb 25, 2015 at 7:36 AM, Peter Griffin <peter.griffin@linaro.org> wrote:
> Now there are generic phy type constants declared in phy.h, migrate over to
> using them rather than defining our own. This change has been done as one
> atomic commit to be bisectable.

You should note that the values of the defines are not changed. If
they did, that would be an ABI breakage.

>
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>

Acked-by: Rob Herring <robh@kernel.org>

> ---
>  Documentation/devicetree/bindings/phy/phy-miphy365x.txt |  8 ++++----
>  arch/arm/boot/dts/stih416.dtsi                          |  4 ++--
>  drivers/phy/phy-miphy365x.c                             | 14 +++++++-------
>  include/dt-bindings/phy/phy-miphy365x.h                 | 14 --------------
>  4 files changed, 13 insertions(+), 27 deletions(-)
>  delete mode 100644 include/dt-bindings/phy/phy-miphy365x.h
>
> diff --git a/Documentation/devicetree/bindings/phy/phy-miphy365x.txt b/Documentation/devicetree/bindings/phy/phy-miphy365x.txt
> index 9802d5d..8772900 100644
> --- a/Documentation/devicetree/bindings/phy/phy-miphy365x.txt
> +++ b/Documentation/devicetree/bindings/phy/phy-miphy365x.txt
> @@ -20,8 +20,8 @@ Required nodes        :  A sub-node is required for each channel the controller
>  Required properties (port (child) node):
>  - #phy-cells   : Should be 1 (See second example)
>                   Cell after port phandle is device type from:
> -                       - MIPHY_TYPE_SATA
> -                       - MIPHY_TYPE_PCI
> +                       - PHY_TYPE_SATA
> +                       - PHY_TYPE_PCI
>  - reg          : Address and length of register sets for each device in
>                   "reg-names"
>  - reg-names     : The names of the register addresses corresponding to the
> @@ -68,10 +68,10 @@ property, containing a phandle to the phy port node and a device type.
>
>  Example:
>
> -#include <dt-bindings/phy/phy-miphy365x.h>
> +#include <dt-bindings/phy/phy.h>
>
>         sata0: sata@fe380000 {
>                 ...
> -               phys      = <&phy_port0 MIPHY_TYPE_SATA>;
> +               phys      = <&phy_port0 PHY_TYPE_SATA>;
>                 ...
>         };
> diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi
> index ea28eba..eeb7afe 100644
> --- a/arch/arm/boot/dts/stih416.dtsi
> +++ b/arch/arm/boot/dts/stih416.dtsi
> @@ -10,7 +10,7 @@
>  #include "stih416-clock.dtsi"
>  #include "stih416-pinctrl.dtsi"
>
> -#include <dt-bindings/phy/phy-miphy365x.h>
> +#include <dt-bindings/phy/phy.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/reset-controller/stih416-resets.h>
>  / {
> @@ -306,7 +306,7 @@
>                         reg             = <0xfe380000 0x1000>;
>                         interrupts      = <GIC_SPI 157 IRQ_TYPE_NONE>;
>                         interrupt-names = "hostc";
> -                       phys            = <&phy_port0 MIPHY_TYPE_SATA>;
> +                       phys            = <&phy_port0 PHY_TYPE_SATA>;
>                         phy-names       = "sata-phy";
>                         resets          = <&powerdown STIH416_SATA0_POWERDOWN>,
>                                           <&softreset STIH416_SATA0_SOFTRESET>;
> diff --git a/drivers/phy/phy-miphy365x.c b/drivers/phy/phy-miphy365x.c
> index 6c80154..98bffbc 100644
> --- a/drivers/phy/phy-miphy365x.c
> +++ b/drivers/phy/phy-miphy365x.c
> @@ -25,7 +25,7 @@
>  #include <linux/mfd/syscon.h>
>  #include <linux/regmap.h>
>
> -#include <dt-bindings/phy/phy-miphy365x.h>
> +#include <dt-bindings/phy/phy.h>
>
>  #define HFC_TIMEOUT            100
>
> @@ -176,7 +176,7 @@ static u8 rx_tx_spd[] = {
>  static int miphy365x_set_path(struct miphy365x_phy *miphy_phy,
>                               struct miphy365x_dev *miphy_dev)
>  {
> -       bool sata = (miphy_phy->type == MIPHY_TYPE_SATA);
> +       bool sata = (miphy_phy->type == PHY_TYPE_SATA);
>
>         return regmap_update_bits(miphy_dev->regmap,
>                                   miphy_phy->ctrlreg,
> @@ -430,7 +430,7 @@ static int miphy365x_init(struct phy *phy)
>         }
>
>         /* Initialise Miphy for PCIe or SATA */
> -       if (miphy_phy->type == MIPHY_TYPE_PCIE)
> +       if (miphy_phy->type == PHY_TYPE_PCIE)
>                 ret = miphy365x_init_pcie_port(miphy_phy, miphy_dev);
>         else
>                 ret = miphy365x_init_sata_port(miphy_phy, miphy_dev);
> @@ -454,8 +454,8 @@ int miphy365x_get_addr(struct device *dev, struct miphy365x_phy *miphy_phy,
>                 return ret;
>         }
>
> -       if (!((!strncmp(name, "sata", 4) && type == MIPHY_TYPE_SATA) ||
> -             (!strncmp(name, "pcie", 4) && type == MIPHY_TYPE_PCIE)))
> +       if (!((!strncmp(name, "sata", 4) && type == PHY_TYPE_SATA) ||
> +             (!strncmp(name, "pcie", 4) && type == PHY_TYPE_PCIE)))
>                 return 0;
>
>         miphy_phy->base = of_iomap(phynode, index);
> @@ -498,8 +498,8 @@ static struct phy *miphy365x_xlate(struct device *dev,
>
>         miphy_phy->type = args->args[0];
>
> -       if (!(miphy_phy->type == MIPHY_TYPE_SATA ||
> -             miphy_phy->type == MIPHY_TYPE_PCIE)) {
> +       if (!(miphy_phy->type == PHY_TYPE_SATA ||
> +             miphy_phy->type == PHY_TYPE_PCIE)) {
>                 dev_err(dev, "Unsupported device type: %d\n", miphy_phy->type);
>                 return ERR_PTR(-EINVAL);
>         }
> diff --git a/include/dt-bindings/phy/phy-miphy365x.h b/include/dt-bindings/phy/phy-miphy365x.h
> deleted file mode 100644
> index 8ef8aba..0000000
> --- a/include/dt-bindings/phy/phy-miphy365x.h
> +++ /dev/null
> @@ -1,14 +0,0 @@
> -/*
> - * This header provides constants for the phy framework
> - * based on the STMicroelectronics MiPHY365x.
> - *
> - * Author: Lee Jones <lee.jones@linaro.org>
> - */
> -#ifndef _DT_BINDINGS_PHY_MIPHY
> -#define _DT_BINDINGS_PHY_MIPHY
> -
> -#define MIPHY_TYPE_SATA                1
> -#define MIPHY_TYPE_PCIE                2
> -#define MIPHY_TYPE_USB         3
> -
> -#endif /* _DT_BINDINGS_PHY_MIPHY */
> --
> 1.9.1
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 1/6] phy: miphy365x: Use the generic phy type constants in dt-bindings/phy/phy.h

[Peter Griffin]

Hi Rob,

On Wed, 25 Feb 2015, Rob Herring wrote:

> On Wed, Feb 25, 2015 at 7:36 AM, Peter Griffin <peter.griffin@linaro.org> wrote:
> > Now there are generic phy type constants declared in phy.h, migrate over to
> > using them rather than defining our own. This change has been done as one
> > atomic commit to be bisectable.
> 
> You should note that the values of the defines are not changed. If
> they did, that would be an ABI breakage.

Yes your right, I was intending to explicity mention that, and then didn't.
In V2 I will update the commit message, along with adding the Ack's.

regards,

Peter.

Re: [PATCH 1/6] phy: miphy365x: Use the generic phy type constants in dt-bindings/phy/phy.h

[Lee Jones]

On Wed, 25 Feb 2015, Peter Griffin wrote:

> Now there are generic phy type constants declared in phy.h, migrate over to
> using them rather than defining our own. This change has been done as one
> atomic commit to be bisectable.
> 
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> ---
>  Documentation/devicetree/bindings/phy/phy-miphy365x.txt |  8 ++++----
>  arch/arm/boot/dts/stih416.dtsi                          |  4 ++--
>  drivers/phy/phy-miphy365x.c                             | 14 +++++++-------
>  include/dt-bindings/phy/phy-miphy365x.h                 | 14 --------------
>  4 files changed, 13 insertions(+), 27 deletions(-)
>  delete mode 100644 include/dt-bindings/phy/phy-miphy365x.h

Nice.

Acked-by: Lee Jones <lee.jones@linaro.org>

> diff --git a/Documentation/devicetree/bindings/phy/phy-miphy365x.txt b/Documentation/devicetree/bindings/phy/phy-miphy365x.txt
> index 9802d5d..8772900 100644
> --- a/Documentation/devicetree/bindings/phy/phy-miphy365x.txt
> +++ b/Documentation/devicetree/bindings/phy/phy-miphy365x.txt
> @@ -20,8 +20,8 @@ Required nodes	:  A sub-node is required for each channel the controller
>  Required properties (port (child) node):
>  - #phy-cells 	: Should be 1 (See second example)
>  		  Cell after port phandle is device type from:
> -			- MIPHY_TYPE_SATA
> -			- MIPHY_TYPE_PCI
> +			- PHY_TYPE_SATA
> +			- PHY_TYPE_PCI
>  - reg        	: Address and length of register sets for each device in
>  		  "reg-names"
>  - reg-names     : The names of the register addresses corresponding to the
> @@ -68,10 +68,10 @@ property, containing a phandle to the phy port node and a device type.
>  
>  Example:
>  
> -#include <dt-bindings/phy/phy-miphy365x.h>
> +#include <dt-bindings/phy/phy.h>
>  
>  	sata0: sata@fe380000 {
>  		...
> -		phys	  = <&phy_port0 MIPHY_TYPE_SATA>;
> +		phys	  = <&phy_port0 PHY_TYPE_SATA>;
>  		...
>  	};
> diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi
> index ea28eba..eeb7afe 100644
> --- a/arch/arm/boot/dts/stih416.dtsi
> +++ b/arch/arm/boot/dts/stih416.dtsi
> @@ -10,7 +10,7 @@
>  #include "stih416-clock.dtsi"
>  #include "stih416-pinctrl.dtsi"
>  
> -#include <dt-bindings/phy/phy-miphy365x.h>
> +#include <dt-bindings/phy/phy.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/reset-controller/stih416-resets.h>
>  / {
> @@ -306,7 +306,7 @@
>  			reg             = <0xfe380000 0x1000>;
>  			interrupts      = <GIC_SPI 157 IRQ_TYPE_NONE>;
>  			interrupt-names = "hostc";
> -			phys	        = <&phy_port0 MIPHY_TYPE_SATA>;
> +			phys	        = <&phy_port0 PHY_TYPE_SATA>;
>  			phy-names       = "sata-phy";
>  			resets	        = <&powerdown STIH416_SATA0_POWERDOWN>,
>  					  <&softreset STIH416_SATA0_SOFTRESET>;
> diff --git a/drivers/phy/phy-miphy365x.c b/drivers/phy/phy-miphy365x.c
> index 6c80154..98bffbc 100644
> --- a/drivers/phy/phy-miphy365x.c
> +++ b/drivers/phy/phy-miphy365x.c
> @@ -25,7 +25,7 @@
>  #include <linux/mfd/syscon.h>
>  #include <linux/regmap.h>
>  
> -#include <dt-bindings/phy/phy-miphy365x.h>
> +#include <dt-bindings/phy/phy.h>
>  
>  #define HFC_TIMEOUT		100
>  
> @@ -176,7 +176,7 @@ static u8 rx_tx_spd[] = {
>  static int miphy365x_set_path(struct miphy365x_phy *miphy_phy,
>  			      struct miphy365x_dev *miphy_dev)
>  {
> -	bool sata = (miphy_phy->type == MIPHY_TYPE_SATA);
> +	bool sata = (miphy_phy->type == PHY_TYPE_SATA);
>  
>  	return regmap_update_bits(miphy_dev->regmap,
>  				  miphy_phy->ctrlreg,
> @@ -430,7 +430,7 @@ static int miphy365x_init(struct phy *phy)
>  	}
>  
>  	/* Initialise Miphy for PCIe or SATA */
> -	if (miphy_phy->type == MIPHY_TYPE_PCIE)
> +	if (miphy_phy->type == PHY_TYPE_PCIE)
>  		ret = miphy365x_init_pcie_port(miphy_phy, miphy_dev);
>  	else
>  		ret = miphy365x_init_sata_port(miphy_phy, miphy_dev);
> @@ -454,8 +454,8 @@ int miphy365x_get_addr(struct device *dev, struct miphy365x_phy *miphy_phy,
>  		return ret;
>  	}
>  
> -	if (!((!strncmp(name, "sata", 4) && type == MIPHY_TYPE_SATA) ||
> -	      (!strncmp(name, "pcie", 4) && type == MIPHY_TYPE_PCIE)))
> +	if (!((!strncmp(name, "sata", 4) && type == PHY_TYPE_SATA) ||
> +	      (!strncmp(name, "pcie", 4) && type == PHY_TYPE_PCIE)))
>  		return 0;
>  
>  	miphy_phy->base = of_iomap(phynode, index);
> @@ -498,8 +498,8 @@ static struct phy *miphy365x_xlate(struct device *dev,
>  
>  	miphy_phy->type = args->args[0];
>  
> -	if (!(miphy_phy->type == MIPHY_TYPE_SATA ||
> -	      miphy_phy->type == MIPHY_TYPE_PCIE)) {
> +	if (!(miphy_phy->type == PHY_TYPE_SATA ||
> +	      miphy_phy->type == PHY_TYPE_PCIE)) {
>  		dev_err(dev, "Unsupported device type: %d\n", miphy_phy->type);
>  		return ERR_PTR(-EINVAL);
>  	}
> diff --git a/include/dt-bindings/phy/phy-miphy365x.h b/include/dt-bindings/phy/phy-miphy365x.h
> deleted file mode 100644
> index 8ef8aba..0000000
> --- a/include/dt-bindings/phy/phy-miphy365x.h
> +++ /dev/null
> @@ -1,14 +0,0 @@
> -/*
> - * This header provides constants for the phy framework
> - * based on the STMicroelectronics MiPHY365x.
> - *
> - * Author: Lee Jones <lee.jones@linaro.org>
> - */
> -#ifndef _DT_BINDINGS_PHY_MIPHY
> -#define _DT_BINDINGS_PHY_MIPHY
> -
> -#define MIPHY_TYPE_SATA		1
> -#define MIPHY_TYPE_PCIE		2
> -#define MIPHY_TYPE_USB		3
> -
> -#endif /* _DT_BINDINGS_PHY_MIPHY */

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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[PATCH 2/6] ahci: st: Update the DT example for how to obtain the PHY.

[Peter Griffin]

The example is wrong in that the phys property should take a
phandle to the phy port.

Also with the changing over to generic PHY type constants we also
update this as well.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
 Documentation/devicetree/bindings/ata/ahci-st.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/ata/ahci-st.txt b/Documentation/devicetree/bindings/ata/ahci-st.txt
index 0574a77..1331202 100644
--- a/Documentation/devicetree/bindings/ata/ahci-st.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-st.txt
@@ -11,7 +11,7 @@ Required properties:
  - reset-names	   :   Associated names must be; "pwr-dwn" and "sw-rst"
  - clocks	   : The phandle for the clock
  - clock-names	   :   Associated name must be; "ahci_clk"
- - phys		   : The phandle for the PHY device
+ - phys		   : The phandle for the PHY port
  - phy-names	   :   Associated name must be; "ahci_phy"
 
 Example:
@@ -21,7 +21,7 @@ Example:
 		reg             = <0xfe380000 0x1000>;
 		interrupts      = <GIC_SPI 157 IRQ_TYPE_NONE>;
 		interrupt-names = "hostc";
-		phys	        = <&miphy365x_phy MIPHY_PORT_0 MIPHY_TYPE_SATA>;
+		phys	        = <&phy_port0 PHY_TYPE_SATA>;
 		phy-names       = "ahci_phy";
 		resets	        = <&powerdown STIH416_SATA0_POWERDOWN>,
 				  <&softreset STIH416_SATA0_SOFTRESET>;
-- 
1.9.1

Re: [PATCH 2/6] ahci: st: Update the DT example for how to obtain the PHY.

[Rob Herring]

On Wed, Feb 25, 2015 at 7:36 AM, Peter Griffin <peter.griffin@linaro.org> wrote:
> The example is wrong in that the phys property should take a
> phandle to the phy port.
>
> Also with the changing over to generic PHY type constants we also
> update this as well.
>
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>

We seem to have a variety of ways to describe phy's with SATA
controllers. Some consistency would have been nice.

However, as this is a doc correction:

Acked-by: Rob Herring <robh@kernel.org>

> ---
>  Documentation/devicetree/bindings/ata/ahci-st.txt | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/ata/ahci-st.txt b/Documentation/devicetree/bindings/ata/ahci-st.txt
> index 0574a77..1331202 100644
> --- a/Documentation/devicetree/bindings/ata/ahci-st.txt
> +++ b/Documentation/devicetree/bindings/ata/ahci-st.txt
> @@ -11,7 +11,7 @@ Required properties:
>   - reset-names    :   Associated names must be; "pwr-dwn" and "sw-rst"
>   - clocks         : The phandle for the clock
>   - clock-names    :   Associated name must be; "ahci_clk"
> - - phys                   : The phandle for the PHY device
> + - phys                   : The phandle for the PHY port
>   - phy-names      :   Associated name must be; "ahci_phy"
>
>  Example:
> @@ -21,7 +21,7 @@ Example:
>                 reg             = <0xfe380000 0x1000>;
>                 interrupts      = <GIC_SPI 157 IRQ_TYPE_NONE>;
>                 interrupt-names = "hostc";
> -               phys            = <&miphy365x_phy MIPHY_PORT_0 MIPHY_TYPE_SATA>;
> +               phys            = <&phy_port0 PHY_TYPE_SATA>;
>                 phy-names       = "ahci_phy";
>                 resets          = <&powerdown STIH416_SATA0_POWERDOWN>,
>                                   <&softreset STIH416_SATA0_SOFTRESET>;
> --
> 1.9.1
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 2/6] ahci: st: Update the DT example for how to obtain the PHY.

[Lee Jones]

On Wed, 25 Feb 2015, Rob Herring wrote:

> On Wed, Feb 25, 2015 at 7:36 AM, Peter Griffin <peter.griffin@linaro.org> wrote:
> > The example is wrong in that the phys property should take a
> > phandle to the phy port.
> >
> > Also with the changing over to generic PHY type constants we also
> > update this as well.
> >
> > Signed-off-by: Peter Griffin <peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> 
> We seem to have a variety of ways to describe phy's with SATA
> controllers. Some consistency would have been nice.

This way is the correct way.  I worked closely with Kishon to get it
right.  He even used this code as an example at ELC, Dusseldorf.

-- 
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Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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Re: [PATCH 2/6] ahci: st: Update the DT example for how to obtain the PHY.

[Lee Jones]

On Wed, 25 Feb 2015, Peter Griffin wrote:

> The example is wrong in that the phys property should take a
> phandle to the phy port.
> 
> Also with the changing over to generic PHY type constants we also
> update this as well.
> 
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> ---
>  Documentation/devicetree/bindings/ata/ahci-st.txt | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Acked-by: Lee Jones <lee.jones@linaro.org>

> diff --git a/Documentation/devicetree/bindings/ata/ahci-st.txt b/Documentation/devicetree/bindings/ata/ahci-st.txt
> index 0574a77..1331202 100644
> --- a/Documentation/devicetree/bindings/ata/ahci-st.txt
> +++ b/Documentation/devicetree/bindings/ata/ahci-st.txt
> @@ -11,7 +11,7 @@ Required properties:
>   - reset-names	   :   Associated names must be; "pwr-dwn" and "sw-rst"
>   - clocks	   : The phandle for the clock
>   - clock-names	   :   Associated name must be; "ahci_clk"
> - - phys		   : The phandle for the PHY device
> + - phys		   : The phandle for the PHY port
>   - phy-names	   :   Associated name must be; "ahci_phy"
>  
>  Example:
> @@ -21,7 +21,7 @@ Example:
>  		reg             = <0xfe380000 0x1000>;
>  		interrupts      = <GIC_SPI 157 IRQ_TYPE_NONE>;
>  		interrupt-names = "hostc";
> -		phys	        = <&miphy365x_phy MIPHY_PORT_0 MIPHY_TYPE_SATA>;
> +		phys	        = <&phy_port0 PHY_TYPE_SATA>;
>  		phy-names       = "ahci_phy";
>  		resets	        = <&powerdown STIH416_SATA0_POWERDOWN>,
>  				  <&softreset STIH416_SATA0_SOFTRESET>;

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

[PATCH 3/6] ARM: DT: STi: STiH407: Update picophyreset for the usb3 controllers usb2 phy

[Peter Griffin]

Ths picophyreset is incorrectly defined, which stops the usb2 phy being
taken out of reset.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
 arch/arm/boot/dts/stih407-family.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index c06a546..186412d 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -280,7 +280,7 @@
 			#phy-cells = <0>;
 			st,syscfg = <&syscfg_core 0x100 0xf4>;
 			resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
-				 <&picophyreset STIH407_PICOPHY0_RESET>;
+				 <&picophyreset STIH407_PICOPHY2_RESET>;
 			reset-names = "global", "port";
 		};
 
-- 
1.9.1

Re: [PATCH 3/6] ARM: DT: STi: STiH407: Update picophyreset for the usb3 controllers usb2 phy

[Lee Jones]

On Wed, 25 Feb 2015, Peter Griffin wrote:

> Ths picophyreset is incorrectly defined, which stops the usb2 phy being
> taken out of reset.
> 
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> ---
>  arch/arm/boot/dts/stih407-family.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by: Lee Jones <lee.jones@linaro.org>

> diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
> index c06a546..186412d 100644
> --- a/arch/arm/boot/dts/stih407-family.dtsi
> +++ b/arch/arm/boot/dts/stih407-family.dtsi
> @@ -280,7 +280,7 @@
>  			#phy-cells = <0>;
>  			st,syscfg = <&syscfg_core 0x100 0xf4>;
>  			resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
> -				 <&picophyreset STIH407_PICOPHY0_RESET>;
> +				 <&picophyreset STIH407_PICOPHY2_RESET>;
>  			reset-names = "global", "port";
>  		};
>  

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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[PATCH 4/6] ARM: DT: STi: STiH407: Add dwc3 usb3 DT node.

[Peter Griffin]

Now that both usb2 and usb3 phy drivers, and also the ST dwc3 glue code
are all present upstream, we can add the dwc3 DT node and have a working
usb3 controller on stih407-b2120 and stih410-b2020.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
 arch/arm/boot/dts/stih407-family.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 186412d..18ff5a5 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -7,6 +7,7 @@
  * publishhed by the Free Software Foundation.
  */
 #include "stih407-pinctrl.dtsi"
+#include <dt-bindings/phy/phy.h>
 #include <dt-bindings/reset-controller/stih407-resets.h>
 / {
 	#address-cells = <1>;
@@ -336,5 +337,30 @@
 				resets = <&softreset STIH407_MIPHY2_SOFTRESET>;
 			};
 		};
+
+		st_dwc3: dwc3@8f94000 {
+			compatible	= "st,stih407-dwc3";
+			reg		= <0x08f94000 0x1000>, <0x110 0x4>;
+			reg-names	= "reg-glue", "syscfg-reg";
+			st,syscfg	= <&syscfg_core>;
+			resets		= <&powerdown STIH407_USB3_POWERDOWN>,
+					  <&softreset STIH407_MIPHY2_SOFTRESET>;
+			reset-names	= "powerdown",
+					  "softreset";
+			#address-cells	= <1>;
+			#size-cells	= <1>;
+			pinctrl-names	= "default";
+			pinctrl-0	= <&pinctrl_usb3>;
+			ranges;
+
+			dwc3: dwc3@9900000 {
+				compatible	= "snps,dwc3";
+				reg		= <0x09900000 0x100000>;
+				interrupts	= <GIC_SPI 155 IRQ_TYPE_NONE>;
+				dr_mode		= "host";
+				phy-names	= "usb2-phy", "usb3-phy";
+				phys		= <&usb2_picophy0>, <&phy_port2 PHY_TYPE_USB3>;
+			};
+		};
 	};
 };
-- 
1.9.1

Re: [PATCH 4/6] ARM: DT: STi: STiH407: Add dwc3 usb3 DT node.

[Lee Jones]

On Wed, 25 Feb 2015, Peter Griffin wrote:

> Now that both usb2 and usb3 phy drivers, and also the ST dwc3 glue code
> are all present upstream, we can add the dwc3 DT node and have a working
> usb3 controller on stih407-b2120 and stih410-b2020.
> 
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> ---
>  arch/arm/boot/dts/stih407-family.dtsi | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
> index 186412d..18ff5a5 100644
> --- a/arch/arm/boot/dts/stih407-family.dtsi
> +++ b/arch/arm/boot/dts/stih407-family.dtsi
> @@ -7,6 +7,7 @@
>   * publishhed by the Free Software Foundation.
>   */
>  #include "stih407-pinctrl.dtsi"
> +#include <dt-bindings/phy/phy.h>
>  #include <dt-bindings/reset-controller/stih407-resets.h>
>  / {
>  	#address-cells = <1>;
> @@ -336,5 +337,30 @@
>  				resets = <&softreset STIH407_MIPHY2_SOFTRESET>;
>  			};
>  		};
> +
> +		st_dwc3: dwc3@8f94000 {
> +			compatible	= "st,stih407-dwc3";
> +			reg		= <0x08f94000 0x1000>, <0x110 0x4>;
> +			reg-names	= "reg-glue", "syscfg-reg";
> +			st,syscfg	= <&syscfg_core>;
> +			resets		= <&powerdown STIH407_USB3_POWERDOWN>,
> +					  <&softreset STIH407_MIPHY2_SOFTRESET>;
> +			reset-names	= "powerdown",
> +					  "softreset";

Nit: What's the purpose of having these on separate lines?

Apart from that, it looks good:

Acked-by: Lee Jones <lee.jones@linaro.org>

> +			#address-cells	= <1>;
> +			#size-cells	= <1>;
> +			pinctrl-names	= "default";
> +			pinctrl-0	= <&pinctrl_usb3>;
> +			ranges;
> +
> +			dwc3: dwc3@9900000 {
> +				compatible	= "snps,dwc3";
> +				reg		= <0x09900000 0x100000>;
> +				interrupts	= <GIC_SPI 155 IRQ_TYPE_NONE>;
> +				dr_mode		= "host";
> +				phy-names	= "usb2-phy", "usb3-phy";
> +				phys		= <&usb2_picophy0>, <&phy_port2 PHY_TYPE_USB3>;
> +			};
> +		};
>  	};
>  };

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Re: [PATCH 4/6] ARM: DT: STi: STiH407: Add dwc3 usb3 DT node.

[Peter Griffin]

Hi Lee,

On Wed, 25 Feb 2015, Lee Jones wrote:

> > +			resets		= <&powerdown STIH407_USB3_POWERDOWN>,
> > +					  <&softreset STIH407_MIPHY2_SOFTRESET>;
> > +			reset-names	= "powerdown",
> > +					  "softreset";
> 
> Nit: What's the purpose of having these on separate lines?

The only reason was to stay aligned with the example in
Documentation/devicetree/bindings/usb/dwc3-st.txt.

regards,

Peter.
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Re: [PATCH 4/6] ARM: DT: STi: STiH407: Add dwc3 usb3 DT node.

[Lee Jones]

On Wed, 25 Feb 2015, Peter Griffin wrote:

> Hi Lee,
> 
> On Wed, 25 Feb 2015, Lee Jones wrote:
> 
> > > +			resets		= <&powerdown STIH407_USB3_POWERDOWN>,
> > > +					  <&softreset STIH407_MIPHY2_SOFTRESET>;
> > > +			reset-names	= "powerdown",
> > > +					  "softreset";
> > 
> > Nit: What's the purpose of having these on separate lines?
> 
> The only reason was to stay aligned with the example in
> Documentation/devicetree/bindings/usb/dwc3-st.txt.

But didn't you author that too? :)

I would change them both.  No need to force a line wrap if it's not required.

-- 
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Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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Re: [PATCH 4/6] ARM: DT: STi: STiH407: Add dwc3 usb3 DT node.

[Peter Griffin]

Hi Lee,

On Wed, 25 Feb 2015, Lee Jones wrote:

> > > > +			reset-names	= "powerdown",
> > > > +					  "softreset";
> > > 
> > > Nit: What's the purpose of having these on separate lines?
> > 
> > The only reason was to stay aligned with the example in
> > Documentation/devicetree/bindings/usb/dwc3-st.txt.
> 
> But didn't you author that too? :)

Yep

> 
> I would change them both.  No need to force a line wrap if it's not required.

Ok, I'll remove it from both in v2, whilst adding the acks.

regards,

Peter.

Re: [PATCH 4/6] ARM: DT: STi: STiH407: Add dwc3 usb3 DT node.

[Maxime Coquelin]

Hi Peter,

On 02/27/2015 11:43 AM, Peter Griffin wrote:
> Hi Lee,
>
> On Wed, 25 Feb 2015, Lee Jones wrote:
>
>>>>> +			reset-names	= "powerdown",
>>>>> +					  "softreset";
>>>> Nit: What's the purpose of having these on separate lines?
>>> The only reason was to stay aligned with the example in
>>> Documentation/devicetree/bindings/usb/dwc3-st.txt.
>> But didn't you author that too? :)
> Yep
>
>> I would change them both.  No need to force a line wrap if it's not required.
> Ok, I'll remove it from both in v2, whilst adding the acks.
Thanks. Once fixed, you can add my:
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>

BR,
Maxime
>
> regards,
>
> Peter.

Re: [PATCH 4/6] ARM: DT: STi: STiH407: Add dwc3 usb3 DT node.

[Maxime Coquelin]

Hi Peter,

On 02/25/2015 02:36 PM, Peter Griffin wrote:
> Now that both usb2 and usb3 phy drivers, and also the ST dwc3 glue code
> are all present upstream, we can add the dwc3 DT node and have a working
> usb3 controller on stih407-b2120 and stih410-b2020.
>
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> ---
>   arch/arm/boot/dts/stih407-family.dtsi | 26 ++++++++++++++++++++++++++
>   1 file changed, 26 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
> index 186412d..18ff5a5 100644
> --- a/arch/arm/boot/dts/stih407-family.dtsi
> +++ b/arch/arm/boot/dts/stih407-family.dtsi
> @@ -7,6 +7,7 @@
>    * publishhed by the Free Software Foundation.
>    */
>   #include "stih407-pinctrl.dtsi"
> +#include <dt-bindings/phy/phy.h>
>   #include <dt-bindings/reset-controller/stih407-resets.h>
>   / {
>   	#address-cells = <1>;
> @@ -336,5 +337,30 @@
>   				resets = <&softreset STIH407_MIPHY2_SOFTRESET>;
>   			};
>   		};
> +
> +		st_dwc3: dwc3@8f94000 {
> +			compatible	= "st,stih407-dwc3";
> +			reg		= <0x08f94000 0x1000>, <0x110 0x4>;
> +			reg-names	= "reg-glue", "syscfg-reg";
> +			st,syscfg	= <&syscfg_core>;
> +			resets		= <&powerdown STIH407_USB3_POWERDOWN>,
> +					  <&softreset STIH407_MIPHY2_SOFTRESET>;
> +			reset-names	= "powerdown",
> +					  "softreset";
> +			#address-cells	= <1>;
> +			#size-cells	= <1>;
> +			pinctrl-names	= "default";
> +			pinctrl-0	= <&pinctrl_usb3>;
> +			ranges;
> +
> +			dwc3: dwc3@9900000 {
> +				compatible	= "snps,dwc3";
> +				reg		= <0x09900000 0x100000>;
> +				interrupts	= <GIC_SPI 155 IRQ_TYPE_NONE>;
> +				dr_mode		= "host";
> +				phy-names	= "usb2-phy", "usb3-phy";
> +				phys		= <&usb2_picophy0>, <&phy_port2 PHY_TYPE_USB3>;
> +			};
> +		};
>   	};
>   };

The USB3 port should only be enabled in the board files, not the soc one.
We can have a board without USB3 port, so it should be disbaled by default.

Other than that, you can enable it also on stih418-b2199, just tested 
and it is working.

Thanks,
Maxime

[PATCH 5/6] usb: dwc3: dwc3-st: Update the DT example.

[Peter Griffin]

There is a subtle type phys-names should be phy-names. Using the
current example means you don't have working usb. Also update
the example to use the generic phy type constants which are now
used for miphy28.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
 Documentation/devicetree/bindings/usb/dwc3-st.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/dwc3-st.txt b/Documentation/devicetree/bindings/usb/dwc3-st.txt
index f9d7025..6634064 100644
--- a/Documentation/devicetree/bindings/usb/dwc3-st.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3-st.txt
@@ -62,7 +62,7 @@ st_dwc3: dwc3@8f94000 {
 		reg		= <0x09900000 0x100000>;
 		interrupts	= <GIC_SPI 155 IRQ_TYPE_NONE>;
 		dr_mode		= "host";
-		phys-names      = "usb2-phy", "usb3-phy";
-		phys            = <&usb2_picophy2>, <&phy_port2 MIPHY_TYPE_USB>;
+		phy-names	= "usb2-phy", "usb3-phy";
+		phys		= <&usb2_picophy2>, <&phy_port2 PHY_TYPE_USB3>;
 	};
 };
-- 
1.9.1

Re: [PATCH 5/6] usb: dwc3: dwc3-st: Update the DT example.

[Rob Herring]

On Wed, Feb 25, 2015 at 7:36 AM, Peter Griffin <peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
> There is a subtle type phys-names should be phy-names. Using the
> current example means you don't have working usb. Also update
> the example to use the generic phy type constants which are now
> used for miphy28.
>
> Signed-off-by: Peter Griffin <peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>

Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

> ---
>  Documentation/devicetree/bindings/usb/dwc3-st.txt | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/usb/dwc3-st.txt b/Documentation/devicetree/bindings/usb/dwc3-st.txt
> index f9d7025..6634064 100644
> --- a/Documentation/devicetree/bindings/usb/dwc3-st.txt
> +++ b/Documentation/devicetree/bindings/usb/dwc3-st.txt
> @@ -62,7 +62,7 @@ st_dwc3: dwc3@8f94000 {
>                 reg             = <0x09900000 0x100000>;
>                 interrupts      = <GIC_SPI 155 IRQ_TYPE_NONE>;
>                 dr_mode         = "host";
> -               phys-names      = "usb2-phy", "usb3-phy";
> -               phys            = <&usb2_picophy2>, <&phy_port2 MIPHY_TYPE_USB>;
> +               phy-names       = "usb2-phy", "usb3-phy";
> +               phys            = <&usb2_picophy2>, <&phy_port2 PHY_TYPE_USB3>;
>         };
>  };
> --
> 1.9.1
>
> --
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[PATCH 6/6] MAINTAINERS: Add phy-miphy28lp.c to ARCH/STI architecture

[Peter Griffin]

This patch adds the phy-miphy28lp.c phy driver found on STMicroelectronics
stih407 family SoC's into the STI arch section of the maintainers file.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index ddc5a8c..1a6180a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1457,6 +1457,7 @@ F:	drivers/clocksource/arm_global_timer.c
 F:	drivers/i2c/busses/i2c-st.c
 F:	drivers/media/rc/st_rc.c
 F:	drivers/mmc/host/sdhci-st.c
+F:	drivers/phy/phy-miphy28lp.c
 F:	drivers/phy/phy-stih407-usb.c
 F:	drivers/phy/phy-stih41x-usb.c
 F:	drivers/pinctrl/pinctrl-st.c
-- 
1.9.1

Re: [PATCH 6/6] MAINTAINERS: Add phy-miphy28lp.c to ARCH/STI architecture

[Lee Jones]

On Wed, 25 Feb 2015, Peter Griffin wrote:

> This patch adds the phy-miphy28lp.c phy driver found on STMicroelectronics
> stih407 family SoC's into the STI arch section of the maintainers file.
> 
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> ---
>  MAINTAINERS | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Lee Jones <lee.jones@linaro.org>

> diff --git a/MAINTAINERS b/MAINTAINERS
> index ddc5a8c..1a6180a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1457,6 +1457,7 @@ F:	drivers/clocksource/arm_global_timer.c
>  F:	drivers/i2c/busses/i2c-st.c
>  F:	drivers/media/rc/st_rc.c
>  F:	drivers/mmc/host/sdhci-st.c
> +F:	drivers/phy/phy-miphy28lp.c
>  F:	drivers/phy/phy-stih407-usb.c
>  F:	drivers/phy/phy-stih41x-usb.c
>  F:	drivers/pinctrl/pinctrl-st.c

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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