From: Ralf Baechle <ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org>
To: Kevin Cernekee <cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org,
tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org,
jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org,
jogo-p3rKhJxN3npAfugRpC6u6w@public.gmane.org,
arnd-r2nGTMty4D4@public.gmane.org,
computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH V6 15/25] MIPS: BMIPS: Flush the readahead cache after DMA
Date: Wed, 25 Mar 2015 10:23:58 +0100 [thread overview]
Message-ID: <20150325092358.GA31933@linux-mips.org> (raw)
In-Reply-To: <1419529760-9520-16-git-send-email-cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On Thu, Dec 25, 2014 at 09:49:10AM -0800, Kevin Cernekee wrote:
> BMIPS 3300/435x/438x CPUs have a readahead cache that is separate from
> the L1/L2. During a DMA operation, accesses adjacent to a DMA buffer
> may cause parts of the DMA buffer to be prefetched into the RAC. To
> avoid possible coherency problems, flush the RAC upon DMA completion.
>
> Signed-off-by: Kevin Cernekee <cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> Signed-off-by: Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> arch/mips/mm/dma-default.c | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
> index af5f046..38ee47a 100644
> --- a/arch/mips/mm/dma-default.c
> +++ b/arch/mips/mm/dma-default.c
> @@ -18,6 +18,7 @@
> #include <linux/highmem.h>
> #include <linux/dma-contiguous.h>
>
> +#include <asm/bmips.h>
> #include <asm/cache.h>
> #include <asm/cpu-type.h>
> #include <asm/io.h>
Aside of platform-specific headers having no business of getting
included directly in a generic arch file, this also breaks the build
of many platforms:
CC arch/mips/mm/dma-default.o
In file included from arch/mips/mm/dma-default.c:21:0:
./arch/mips/include/asm/bmips.h: In function ‘bmips_read_zscm_reg’:
./arch/mips/include/asm/bmips.h:97:160: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
cache_op(Index_Load_Tag_S, ZSCM_REG_BASE + offset);
^
./arch/mips/include/asm/bmips.h: In function ‘bmips_write_zscm_reg’:
./arch/mips/include/asm/bmips.h:118:160: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
cache_op(Index_Store_Tag_S, ZSCM_REG_BASE + offset);
I think the broken platforms are all the 64 bit platforms.
Ralf
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next prev parent reply other threads:[~2015-03-25 9:23 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-25 17:48 [PATCH V6 00/25] Generic BMIPS kernel Kevin Cernekee
2014-12-25 17:48 ` [PATCH V6 01/25] MIPS: bcm3384: Fix outdated use of mips_cpu_intc_init() Kevin Cernekee
2014-12-25 17:48 ` [PATCH V6 02/25] MIPS: Move device-trees into vendor sub-directories Kevin Cernekee
2014-12-25 17:48 ` [PATCH V6 03/25] MIPS: Add dtbs_install target Kevin Cernekee
2014-12-25 17:48 ` [PATCH V6 04/25] MIPS: Create a common <asm/mach-generic/war.h> Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 05/25] MIPS: bcm3384: Rename "bcm3384" target to "bmips" Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 07/25] irqchip: brcmstb-l2: don't clear wakeable interrupts at init time Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 08/25] irqchip: bcm7120-l2: Refactor driver for arbitrary IRQEN/IRQSTAT offsets Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 10/25] irqchip: bcm7120-l2: Add support for BCM3380-style controllers Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 11/25] irqchip: Add new driver for BCM7038-style level 1 interrupt controllers Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 12/25] MIPS: Let __dt_register_buses accept a single bus type Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 13/25] MIPS: Fall back to the generic restart notifier Kevin Cernekee
[not found] ` <1419529760-9520-1-git-send-email-cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-12-25 17:49 ` [PATCH V6 06/25] irqchip: Update docs regarding irq_domain_add_tree() Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 09/25] irqchip: bcm7120-l2: Split STB-specific logic into its own function Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 14/25] MIPS: Reorder MIPS_L1_CACHE_SHIFT priorities Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 17/25] MIPS: BMIPS: Rewrite DMA code to use "dma-ranges" property Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 18/25] MIPS: BMIPS: Remove bogus bus name Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 22/25] MIPS: BMIPS: Enable additional peripheral and CPU support in defconfig Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 23/25] MIPS: BMIPS: Refresh BCM3384 DTS files Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 24/25] MIPS: BMIPS: Update DT bindings to reflect new SoC support Kevin Cernekee
2014-12-31 15:51 ` [PATCH V6 00/25] Generic BMIPS kernel Florian Fainelli
2014-12-25 17:49 ` [PATCH V6 15/25] MIPS: BMIPS: Flush the readahead cache after DMA Kevin Cernekee
[not found] ` <1419529760-9520-16-git-send-email-cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-03-25 9:23 ` Ralf Baechle [this message]
2015-03-25 17:08 ` Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 16/25] MIPS: BMIPS: Document the firmware->kernel DTB interface Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 19/25] MIPS: BMIPS: Add quirks for several Broadcom platforms Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 20/25] MIPS: BMIPS: Delete the irqchip driver from irq.c Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 21/25] MIPS: BMIPS: Use a non-default FIXADDR_TOP setting Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 25/25] MIPS: BMIPS: Add DTS files for several platforms Kevin Cernekee
2015-03-24 22:48 ` [PATCH V6 00/25] Generic BMIPS kernel Florian Fainelli
2015-03-29 20:18 ` Jason Cooper
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