From: Mark Rutland <mark.rutland@arm.com>
To: Al Stone <ahs3@redhat.com>
Cc: Kumar Gala <galak@codeaurora.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
Catalin Marinas <Catalin.Marinas@arm.com>,
"linux-arm-msm@vger.kernel.org" <linux-arm-msm@vger.kernel.org>,
Will Deacon <Will.Deacon@arm.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"arm@kernel.org" <arm@kernel.org>,
Abhimanyu Kapur <abhimany@codeaurora.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC PATCH 5/5] arm64: qcom: add cpu operations
Date: Wed, 15 Apr 2015 10:04:25 +0100 [thread overview]
Message-ID: <20150415090425.GA2866@leverpostej> (raw)
In-Reply-To: <552D9A37.6070107@redhat.com>
On Tue, Apr 14, 2015 at 11:52:39PM +0100, Al Stone wrote:
> On 04/14/2015 10:29 AM, Mark Rutland wrote:
> >> diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> >> index 8b9e0a9..35cabe5 100644
> >> --- a/Documentation/devicetree/bindings/arm/cpus.txt
> >> +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> >> @@ -185,6 +185,8 @@ nodes to be present and contain the properties described below.
> >> be one of:
> >> "psci"
> >> "spin-table"
> >
> > In the case of these two, there's documentation on what the OS, FW, and
> > HW are expected to do. There's a PSCI spec, and spin-table is documented
> > in booting.txt (which is admittedly not fantastic).
> > [snip...]
>
> Perhaps a side topic, but I thought spin-table was being actively discouraged
> for arm64. Forgive me if I missed the memo, but is that not correct?
We prefer that people implement PSCI, and if they must use spin-table,
each CPU has its own release address.
However, we don't want implementation-specific mechanisms, and
spin-table is preferable to these.
Mark.
next prev parent reply other threads:[~2015-04-15 9:04 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-09 17:37 [RFC PATCH 0/5] Add smp booting support for Qualcomm ARMv8 SoCs Kumar Gala
2015-04-09 17:37 ` [RFC PATCH 3/5] arm64: introduce CPU_OF_TABLES for cpu ops selection Kumar Gala
2015-04-09 21:17 ` Arnd Bergmann
2015-04-14 15:52 ` Mark Rutland
2015-04-10 10:28 ` Lorenzo Pieralisi
[not found] ` <1428601031-5366-1-git-send-email-galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2015-04-09 17:37 ` [RFC PATCH 5/5] arm64: qcom: add cpu operations Kumar Gala
2015-04-09 21:19 ` Arnd Bergmann
2015-04-10 10:08 ` Catalin Marinas
2015-04-10 10:39 ` Lorenzo Pieralisi
2015-04-14 16:29 ` Mark Rutland
2015-04-14 20:51 ` Arnd Bergmann
2015-04-15 14:46 ` Catalin Marinas
2015-04-14 22:52 ` Al Stone
2015-04-15 9:04 ` Mark Rutland [this message]
2015-04-15 14:53 ` Catalin Marinas
2015-04-15 16:29 ` Al Stone
2015-04-10 10:05 ` [RFC PATCH 0/5] Add smp booting support for Qualcomm ARMv8 SoCs Catalin Marinas
[not found] ` <20150410100529.GA6854-M2fw3Uu6cmfZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>
2015-04-10 15:24 ` Kumar Gala
[not found] ` <493B15F8-0EBE-4633-9604-671EF403F36E-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2015-04-10 16:10 ` Catalin Marinas
2015-04-10 19:06 ` Kumar Gala
2015-04-13 9:41 ` Catalin Marinas
2015-04-14 14:21 ` Kumar Gala
2015-04-14 14:44 ` Kumar Gala
2015-04-14 15:45 ` Mark Rutland
2015-04-14 22:32 ` Lorenzo Pieralisi
2015-04-15 16:17 ` Lina Iyer
2015-04-15 17:35 ` Lorenzo Pieralisi
2015-04-15 14:27 ` Catalin Marinas
2015-04-14 16:36 ` Mark Rutland
2015-04-14 19:49 ` Kumar Gala
2015-04-14 21:17 ` Catalin Marinas
2015-04-14 21:48 ` Rob Clark
[not found] ` <CAF6AEGtoxNrCoxT5n0CXmKMnL-YprJ3DkAuM4Myi87WMxPqBGw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-04-15 13:34 ` Catalin Marinas
2015-04-15 15:01 ` Rob Clark
2015-04-16 15:21 ` Catalin Marinas
[not found] ` <20150416152121.GE819-M2fw3Uu6cmfZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>
2015-04-16 17:17 ` Rob Clark
[not found] ` <CAF6AEGt3bf70MUWFU_kqtc8KDR09tMUCkXbqOq0SpOXU44moTg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-04-16 21:39 ` Catalin Marinas
2015-04-16 22:03 ` Matt Sealey
2015-04-10 11:03 ` Lorenzo Pieralisi
2015-04-10 15:25 ` Kumar Gala
2015-04-10 16:07 ` Lorenzo Pieralisi
2015-04-16 22:08 ` Rob Herring
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150415090425.GA2866@leverpostej \
--to=mark.rutland@arm.com \
--cc=Catalin.Marinas@arm.com \
--cc=Will.Deacon@arm.com \
--cc=abhimany@codeaurora.org \
--cc=ahs3@redhat.com \
--cc=arm@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=galak@codeaurora.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).