From: David Miller <davem@davemloft.net>
To: sergei.shtylyov@cogentembedded.com
Cc: mitsuhiro.kimura.kc@renesas.com, f.fainelli@gmail.com,
robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, devicetree@vger.kernel.org,
galak@codeaurora.org, netdev@vger.kernel.org,
richardcochran@gmail.com, linux-sh@vger.kernel.org,
masaru.nagai.vx@renesas.com
Subject: Re: [PATCH v3] Renesas Ethernet AVB driver
Date: Wed, 22 Apr 2015 18:41:33 -0400 (EDT) [thread overview]
Message-ID: <20150422.184133.132510003688162502.davem@davemloft.net> (raw)
In-Reply-To: <553821F8.8050300@cogentembedded.com>
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Date: Thu, 23 Apr 2015 01:34:32 +0300
> Sigh... I'm seeing no way out of that then, only copying. :-(
What exactly is the device's restriction?
Any reasonable modern chip allows one of two things.
Either it allows arbitrary alignment of the start of the TX
frame when DMA'ing.
_or_
It allows a variable number of pad bytes to be inserted by the
driver before giving it to the card, which do not go onto the
wire, in order to meet the device's DMA restrictions.
For example, if the packet is only 2 byte aligned, you set the "ignore
offset" to 2 and push two zero bytes in front of the ethernet frame
before giving it to the card.
If a chip made in this day and era cannot do one of those two things,
this is beyond disappointing and is a massive engineering failure.
Whoever designed this chip made no investigation into how their
hardware is going to be actually used.
next prev parent reply other threads:[~2015-04-22 22:41 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-13 22:07 [PATCH v3] Renesas Ethernet AVB driver Sergei Shtylyov
2015-04-13 22:38 ` Florian Fainelli
2015-04-14 21:37 ` Sergei Shtylyov
2015-04-22 5:04 ` MITSUHIRO KIMURA
2015-04-22 15:36 ` David Miller
2015-04-22 20:30 ` Sergei Shtylyov
2015-04-22 20:42 ` David Miller
2015-04-22 20:46 ` Sergei Shtylyov
2015-04-22 22:17 ` David Miller
2015-04-22 21:38 ` Sergei Shtylyov
2015-04-22 22:18 ` David Miller
2015-04-22 22:34 ` Sergei Shtylyov
2015-04-22 22:41 ` David Miller [this message]
2015-04-22 22:50 ` Sergei Shtylyov
2015-04-24 9:03 ` David Laight
2015-04-24 18:27 ` Sergei Shtylyov
2015-04-27 9:22 ` David Laight
2015-04-22 23:22 ` Florian Fainelli
2015-04-24 18:53 ` Sergei Shtylyov
2015-04-28 17:09 ` Ben Hutchings
2015-05-07 21:10 ` Sergei Shtylyov
2015-05-07 21:25 ` Sergei Shtylyov
2015-04-14 0:49 ` Lino Sanfilippo
2015-04-14 11:31 ` David Laight
2015-04-19 22:10 ` Sergei Shtylyov
2015-04-19 23:45 ` Lino Sanfilippo
2015-04-19 9:19 ` Richard Cochran
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