From: Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Cc: Mike Turquette
<mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
YH Chen <yh.chen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Henry Chen <henryc.chen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org,
Matthias Brugger
<matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Yingjoe Chen
<Yingjoe.Chen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
Eddie Huang <eddie.huang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 6/6] dt-bindings: ARM: Mediatek: Document devicetree bindings for clock/reset controllers
Date: Thu, 30 Apr 2015 18:20:39 -0700 [thread overview]
Message-ID: <20150501012039.GG32407@codeaurora.org> (raw)
In-Reply-To: <1429778143-2074-7-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
On 04/23, Sascha Hauer wrote:
> This adds the binding documentation for the apmixedsys, perisys and
> infracfg controllers found on Mediatek SoCs.
>
> Signed-off-by: Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Please Cc devicetree reviewers on bindings (CCed now).
> ---
> .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 23 +++++++++++++++++
> .../bindings/arm/mediatek/mediatek,infracfg.txt | 30 ++++++++++++++++++++++
> .../bindings/arm/mediatek/mediatek,pericfg.txt | 30 ++++++++++++++++++++++
> .../bindings/arm/mediatek/mediatek,topckgen.txt | 23 +++++++++++++++++
> 4 files changed, 106 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt
> create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt
> create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt
> create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt
> new file mode 100644
> index 0000000..5af6d73
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt
> @@ -0,0 +1,23 @@
> +Mediatek apmixedsys controller
> +==============================
> +
> +The Mediatek apmixedsys controller provides the PLLs to the system.
> +
> +Required Properties:
> +
> +- compatible: Should be:
> + - "mediatek,mt8135-apmixedsys"
> + - "mediatek,mt8173-apmixedsys"
> +- #clock-cells: Must be 1
> +
> +The apmixedsys controller uses the common clk binding from
> +Documentation/devicetree/bindings/clock/clock-bindings.txt
> +The available clocks are defined in dt-bindings/clock/mt*-clk.h.
> +
> +Example:
> +
> +apmixedsys: apmixedsys@10209000 {
apmixedsys: clock-controller@10209000 {
would be more standard. The same comment applies throughout this
patch. Otherwise it looks good to me.
-Stephen
> + compatible = "mediatek,mt8173-apmixedsys";
> + reg = <0 0x10209000 0 0x1000>;
> + #clock-cells = <1>;
> +};
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt
> new file mode 100644
> index 0000000..684da473
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt
> @@ -0,0 +1,30 @@
> +Mediatek infracfg controller
> +============================
> +
> +The Mediatek infracfg controller provides various clocks and reset
> +outputs to the system.
> +
> +Required Properties:
> +
> +- compatible: Should be:
> + - "mediatek,mt8135-infracfg", "syscon"
> + - "mediatek,mt8173-infracfg", "syscon"
> +- #clock-cells: Must be 1
> +- #reset-cells: Must be 1
> +
> +The infracfg controller uses the common clk binding from
> +Documentation/devicetree/bindings/clock/clock-bindings.txt
> +The available clocks are defined in dt-bindings/clock/mt*-clk.h.
> +Also it uses the common reset controller binding from
> +Documentation/devicetree/bindings/reset/reset.txt.
> +The available reset outputs are defined in
> +dt-bindings/reset-controller/mt*-resets.h
> +
> +Example:
> +
> +infracfg: infracfg@10001000 {
> + compatible = "mediatek,mt8173-infracfg", "syscon";
> + reg = <0 0x10001000 0 0x1000>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> +};
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt
> new file mode 100644
> index 0000000..fdb45c6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt
> @@ -0,0 +1,30 @@
> +Mediatek pericfg controller
> +===========================
> +
> +The Mediatek pericfg controller provides various clocks and reset
> +outputs to the system.
> +
> +Required Properties:
> +
> +- compatible: Should be:
> + - "mediatek,mt8135-pericfg", "syscon"
> + - "mediatek,mt8173-pericfg", "syscon"
> +- #clock-cells: Must be 1
> +- #reset-cells: Must be 1
> +
> +The pericfg controller uses the common clk binding from
> +Documentation/devicetree/bindings/clock/clock-bindings.txt
> +The available clocks are defined in dt-bindings/clock/mt*-clk.h.
> +Also it uses the common reset controller binding from
> +Documentation/devicetree/bindings/reset/reset.txt.
> +The available reset outputs are defined in
> +dt-bindings/reset-controller/mt*-resets.h
> +
> +Example:
> +
> +pericfg: pericfg@10003000 {
> + compatible = "mediatek,mt8173-pericfg", "syscon";
> + reg = <0 0x10003000 0 0x1000>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> +};
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt
> new file mode 100644
> index 0000000..a425248
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt
> @@ -0,0 +1,23 @@
> +Mediatek topckgen controller
> +============================
> +
> +The Mediatek topckgen controller provides various clocks to the system.
> +
> +Required Properties:
> +
> +- compatible: Should be:
> + - "mediatek,mt8135-topckgen"
> + - "mediatek,mt8173-topckgen"
> +- #clock-cells: Must be 1
> +
> +The topckgen controller uses the common clk binding from
> +Documentation/devicetree/bindings/clock/clock-bindings.txt
> +The available clocks are defined in dt-bindings/clock/mt*-clk.h.
> +
> +Example:
> +
> +topckgen: topckgen@10000000 {
> + compatible = "mediatek,mt8173-topckgen";
> + reg = <0 0x10000000 0 0x1000>;
> + #clock-cells = <1>;
> +};
> --
> 2.1.4
>
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next parent reply other threads:[~2015-05-01 1:20 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1429778143-2074-1-git-send-email-s.hauer@pengutronix.de>
[not found] ` <1429778143-2074-7-git-send-email-s.hauer@pengutronix.de>
[not found] ` <1429778143-2074-7-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-05-01 1:20 ` Stephen Boyd [this message]
[not found] ` <20150501012039.GG32407-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2015-05-04 8:38 ` [PATCH 6/6] dt-bindings: ARM: Mediatek: Document devicetree bindings for clock/reset controllers Sascha Hauer
[not found] ` <20150504083852.GJ4946-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-05-06 5:53 ` Stephen Boyd
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