From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH v2 07/10] pinctrl: sunxi: Add H3 PIO controller support Date: Sun, 17 May 2015 16:30:14 +0200 Message-ID: <20150517143014.GH4004@lukather> References: <1431707940-19372-1-git-send-email-jenskuske@gmail.com> <1431707940-19372-8-git-send-email-jenskuske@gmail.com> Reply-To: maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="T+d4WTH4wtHHX3b6" Return-path: Content-Disposition: inline In-Reply-To: <1431707940-19372-8-git-send-email-jenskuske-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Jens Kuske Cc: Emilio =?iso-8859-1?Q?L=F3pez?= , Mike Turquette , Linus Walleij , Rob Herring , Chen-Yu Tsai , Vishnu Patekar , Hans de Goede , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org --T+d4WTH4wtHHX3b6 Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline On Fri, May 15, 2015 at 06:38:57PM +0200, Jens Kuske wrote: > The H3 uses the same pin controller as previous SoC's from Allwinner. > Add support for the pins controlled by the main PIO controller. > > Signed-off-by: Jens Kuske > --- > .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + > drivers/pinctrl/sunxi/Kconfig | 8 + > drivers/pinctrl/sunxi/Makefile | 1 + > drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c | 522 +++++++++++++++++++++ > 4 files changed, 532 insertions(+) > create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c > > diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt > index fdd8046..c46af8e 100644 > --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt > +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt > @@ -16,6 +16,7 @@ Required properties: > "allwinner,sun7i-a20-pinctrl" > "allwinner,sun8i-a23-pinctrl" > "allwinner,sun8i-a23-r-pinctrl" > + "allwinner,sun8i-h3-pinctrl" > - reg: Should contain the register physical address and length for the > pin controller. > > diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig > index 2eb893e..6c1cec5 100644 > --- a/drivers/pinctrl/sunxi/Kconfig > +++ b/drivers/pinctrl/sunxi/Kconfig > @@ -43,6 +43,14 @@ config PINCTRL_SUN8I_A23_R > depends on RESET_CONTROLLER > select PINCTRL_SUNXI_COMMON > > +config PINCTRL_SUN8I_H3 > + tristate "Allwinner H3 pinctrl driver" > + default MACH_SUN8I > + select PINCTRL_SUNXI_COMMON PINCTRL_SUNXI_COMMON should probably be turned into a tristate as well Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --T+d4WTH4wtHHX3b6--