From: Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
To: Daniel Kurtz <djkurtz-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Cc: "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
"open list:OPEN FIRMWARE AND..."
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
Kevin Hilman <khilman-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Sasha Hauer <kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
Matthias Brugger
<matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Subject: Re: [PATCH 1/5] soc: mediatek: Add infracfg misc driver support
Date: Mon, 18 May 2015 10:16:25 +0200 [thread overview]
Message-ID: <20150518081625.GO6325@pengutronix.de> (raw)
In-Reply-To: <CAGS+omADXpnBnLvuH+xNmatL+89kLBELz6KqMFid7SOx=veiAg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
Hi Daniel,
On Fri, May 15, 2015 at 10:17:33PM +0800, Daniel Kurtz wrote:
> Hi Sascha,
>
> On Tue, May 12, 2015 at 3:23 AM, Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> wrote:
> > This adds support for some miscellaneous bits of the infracfg controller.
> > The mtk_infracfg_set/clear_bus_protection functions are necessary for
> > the scpsys power domain driver to handle the bus protection bits which
> > are contained in the infacfg register space.
> >
> > Signed-off-by: Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> > ---
> > drivers/soc/mediatek/Kconfig | 9 +++++
> > drivers/soc/mediatek/Makefile | 1 +
> > drivers/soc/mediatek/mtk-infracfg.c | 80 +++++++++++++++++++++++++++++++++++++
> > 3 files changed, 90 insertions(+)
> > create mode 100644 drivers/soc/mediatek/mtk-infracfg.c
> >
> > diff --git a/drivers/soc/mediatek/Kconfig b/drivers/soc/mediatek/Kconfig
> > index bcdb22d..6fae66f 100644
> > --- a/drivers/soc/mediatek/Kconfig
> > +++ b/drivers/soc/mediatek/Kconfig
> > @@ -9,3 +9,12 @@ config MTK_PMIC_WRAP
> > Say yes here to add support for MediaTek PMIC Wrapper found
> > on different MediaTek SoCs. The PMIC wrapper is a proprietary
> > hardware to connect the PMIC.
> > +
> > +config MTK_INFRACFG
>
> nit: Could you alphabetize these config options - so this one before
> MTK_PMIC_WRAP
>
> > + tristate "MediaTek INFRACFG Support"
> > + depends on ARCH_MEDIATEK
>
> I've seen several drivers like this now:
>
> depends on ARCH_MEDIATEK || COMPILE_TEST
>
>
> > + select REGMAP
> > + help
> > + Say yes here to add support for the MediaTek INFRACFG controller. The
> > + INFRACFG controller contains various infrastructure registers not
> > + directly associated to any device.
> > diff --git a/drivers/soc/mediatek/Makefile b/drivers/soc/mediatek/Makefile
> > index ecaf4de..ce39119 100644
> > --- a/drivers/soc/mediatek/Makefile
> > +++ b/drivers/soc/mediatek/Makefile
> > @@ -1 +1,2 @@
> > obj-$(CONFIG_MTK_PMIC_WRAP) += mtk-pmic-wrap.o
> > +obj-$(CONFIG_MTK_INFRACFG) += mtk-infracfg.o
>
> alphabetize here, too.
>
> > diff --git a/drivers/soc/mediatek/mtk-infracfg.c b/drivers/soc/mediatek/mtk-infracfg.c
> > new file mode 100644
> > index 0000000..b3ebfae
> > --- /dev/null
> > +++ b/drivers/soc/mediatek/mtk-infracfg.c
> > @@ -0,0 +1,80 @@
> > +#include <linux/regmap.h>
> > +#include <linux/export.h>
> > +#include <linux/jiffies.h>
> > +#include <linux/soc/mediatek/infracfg.h>
> > +#include <asm/processor.h>
>
> and... alphabetize headers here.
>
> I'm not sure if people care, but I find it makes it much easier to
> merge/add things later if these lists are already sorted.
> Same "please alphabetize" comments for the mtk-scpsys patch, so I
> won't repeat them.
>
> > +
> > +#define INFRA_TOPAXI_PROTECTEN 0x0220
> > +#define INFRA_TOPAXI_PROTECTSTA1 0x0228
> > +
> > +/**
> > + * mtk_infracfg_set_bus_protection - enable bus protection
> > + * @regmap: The infracfg regmap
> > + * @mask: The mask containing the protection bits to be enabled.
> > + *
> > + * This function enables the bus protection bits for disabled power
> > + * domains so that the system does not hanf when some unit accesses the
> > + * bus while in power down.
> > + */
> > +int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask)
> > +{
> > + unsigned long expired;
> > + u32 val;
> > + int ret;
> > +
> > + regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, mask);
> > +
> > + expired = jiffies + HZ;
> > +
> > + while (1) {
> > + ret = regmap_read(infracfg, INFRA_TOPAXI_PROTECTSTA1, &val);
> > + if (ret)
> > + return ret;
> > +
> > + if ((val & mask) == mask)
> > + break;
> > +
> > + cpu_relax();
> > + if (time_after(jiffies, expired))
> > + return -EIO;
>
> I think we should check for timeout first, and then cpu_relax() if
> there is still time left (here and in
> mtk_infracfg_clear_bus_protection()). Otherwise we end up doing one
> final cpu_relax() without rechecking the register we are polling
> (again, I have the same comment for the timeout loops in mtk-scpsys).
I think cpu_relax() delays execution in the order of microseconds (I
don't actually know, just a guess), so if the timeout is a second the
order doesn't really matter. What can happen though is an interrupt
after the (val & mask) test but before the timeout check. So to be
truly correct we have to repeat the (val & mask) test after the
time_after() check. Is that what you want?
>
> Also, shouldn't we return -ETIMEOUT if we timeout?
I dunno. Probably the operation operation timed out because of an IO
error. I'll change it to -ETIMEDOUT.
Sascha
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next prev parent reply other threads:[~2015-05-18 8:16 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-11 19:23 [PATCH v2] Mediatek SCPSYS power domain support Sascha Hauer
[not found] ` <1431372206-1237-1-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-05-11 19:23 ` [PATCH 1/5] soc: mediatek: Add infracfg misc driver support Sascha Hauer
2015-05-12 7:12 ` Sascha Hauer
[not found] ` <1431372206-1237-2-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-05-12 9:24 ` Paul Bolle
2015-05-12 13:26 ` Sascha Hauer
2015-05-15 14:17 ` Daniel Kurtz
[not found] ` <CAGS+omADXpnBnLvuH+xNmatL+89kLBELz6KqMFid7SOx=veiAg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-05-18 8:16 ` Sascha Hauer [this message]
2015-05-19 6:54 ` Daniel Kurtz
2015-05-19 7:45 ` Sascha Hauer
[not found] ` <20150519074535.GY6325-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-05-19 10:39 ` Daniel Kurtz
2015-05-26 23:12 ` Kevin Hilman
[not found] ` <7hfv6jorw9.fsf-1D3HCaltpLuhEniVeURVKkEOCMrvLtNR@public.gmane.org>
2015-05-27 7:33 ` Sascha Hauer
2015-05-11 19:23 ` [PATCH 2/5] dt-bindings: soc: Add documentation for the MediaTek SCPSYS unit Sascha Hauer
2015-05-11 19:23 ` [PATCH 3/5] soc: Mediatek: Add SCPSYS power domain driver Sascha Hauer
2015-05-12 11:52 ` Matthias Brugger
2015-05-12 13:47 ` Sascha Hauer
2015-05-15 14:17 ` Daniel Kurtz
[not found] ` <CAGS+omDJ-7+L_46vwMyewHMkMNj69odhp=JY5i6Xj3-Loe6UNA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-05-19 10:30 ` Sascha Hauer
2015-05-19 11:06 ` Matthias Brugger
2015-05-20 14:03 ` Sascha Hauer
2015-05-20 16:06 ` Matthias Brugger
2015-05-11 19:23 ` [PATCH 4/5] ARM64: MediaTek: Add generic pm domain support Sascha Hauer
2015-05-11 19:23 ` [PATCH 5/5] ARM64: MediaTek MT8173: Add SCPSYS device node Sascha Hauer
-- strict thread matches above, loose matches on Subject: below --
2015-05-20 14:18 [PATCH v3] Mediatek SCPSYS power domain support Sascha Hauer
[not found] ` <1432131540-2523-1-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-05-20 14:18 ` [PATCH 1/5] soc: mediatek: Add infracfg misc driver support Sascha Hauer
[not found] ` <1432131540-2523-2-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-05-21 8:09 ` Paul Bolle
2015-06-09 8:46 [PATCH v4] Mediatek SCPSYS power domain support Sascha Hauer
[not found] ` <1433839623-10804-1-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-06-09 8:46 ` [PATCH 1/5] soc: mediatek: Add infracfg misc driver support Sascha Hauer
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