[PATCH 00/04] ARM: shmobile: APMU DT support via SMP Enable method

[PATCH 00/04] ARM: shmobile: APMU DT support via SMP Enable method

[Magnus Damm]

ARM: shmobile: APMU DT support via SMP Enable method

[PATCH 01/04] devicetree: bindings: Renesas APMU and SMP Enable method
[PATCH 02/04] ARM: shmobile: Add APMU DT support via Enable method
[PATCH 03/04] ARM: shmobile: Add APMU nodes to r8a7791 DTSI
[PATCH 04/04] ARM: shmobile: Remove r8a7791 non-DT APMU override

These patches add DT support for the APMU hardware commonly found in
Renesas R-Car Gen2 SoCs. Without these patches the APMU gets configured
through data expressed in C, and with this series applied it is possible
to describe the APMU configuration in DT and let the enable method point
out that the APMU should be used.

Patch 1 and 2 are Documenting and adding DT support to the APMU driver
together with enabling use of the enable-method way to describe that
the APMU hardware is needed for SMP operation.

Patch 3 and 4 are related to r8a7791 support which gets a DTSI update to
describe the APMU hardware. To avoid breaking support for older DTBs out
in the wild these patches keep the older existing C code APMU configuration
for r8a7791 as-is. During run-time, if the APMU is installed via the
enable-method then it will not be overriden by older non-DT configuration.

I suggest making APMU DT configuration mandatory for SMP operation on
newer SoCs and that we keep the old APMU support code in place for a
good number of kernel releases or until we can identify a couple of major
reasons good enough to force a DTB update on the end users.

The series have been tested on r8a7791 Koelsch in 4 cases:
A) Default case when series is applied - 2 cores - OK (DT APMU)
B) Like A) but r8a7791 smp_init() commented out - 2 cores - OK (DT APMU)
C) Like B) but with patch 3 reverted - 1 core - OK (No SMP available)
D) Like C) but reverted commented out code from B) - 2 cores - OK (C APMU)

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---
 Written against renesas-devel-20150519-v4.1-rc4

 Documentation/devicetree/bindings/arm/cpus.txt           |    1 
 Documentation/devicetree/bindings/power/renesas,apmu.txt |   31 ++++
 arch/arm/boot/dts/r8a7791.dtsi                           |    7 +
 arch/arm/mach-shmobile/platsmp-apmu.c                    |   89 +++++++++++++-
 arch/arm/mach-shmobile/r8a7791.h                         |    2 
 arch/arm/mach-shmobile/setup-r8a7791.c                   |    2 
 arch/arm/mach-shmobile/smp-r8a7791.c                     |   11 +
 7 files changed, 136 insertions(+), 7 deletions(-)

[PATCH 01/04] devicetree: bindings: Renesas APMU and SMP Enable method

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Add DT binding documentation for the APMU hardware and add "renesas,apmu"
to the list of enable methods for the ARM cpus.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Documentation/devicetree/bindings/arm/cpus.txt           |    1 
 Documentation/devicetree/bindings/power/renesas,apmu.txt |   31 ++++++++++++++
 2 files changed, 32 insertions(+)

--- 0001/Documentation/devicetree/bindings/arm/cpus.txt
+++ work/Documentation/devicetree/bindings/arm/cpus.txt	2015-05-20 21:55:51.912366518 +0900
@@ -197,6 +197,7 @@ nodes to be present and contain the prop
 			    "qcom,gcc-msm8660"
 			    "qcom,kpss-acc-v1"
 			    "qcom,kpss-acc-v2"
+			    "renesas,apmu"
 			    "rockchip,rk3066-smp"
 
 	- cpu-release-addr
--- /dev/null
+++ work/Documentation/devicetree/bindings/power/renesas,apmu.txt	2015-05-20 22:39:34.872366518 +0900
@@ -0,0 +1,31 @@
+DT bindings for the Renesas Advanced Power Management Unit
+
+Renesas R-Car line of SoCs utilize one or more APMU hardware units
+for CPU core power domain control including SMP boot and CPU Hotplug.
+
+Required properties:
+
+- compatible: Should be "renesas,apmu-<soctype>", "renesas,apmu" as fallback.
+	      Examples with soctypes are:
+		- "renesas,apmu-r8a7790" (R-Car H2)
+		- "renesas,apmu-r8a7791" (R-Car M2-W)
+		- "renesas,apmu-r8a7792" (R-Car V2H)
+		- "renesas,apmu-r8a7793" (R-Car M2-N)
+		- "renesas,apmu-r8a7794" (R-Car E2)
+
+- reg: Base address and length of the I/O registers used by the APMU.
+
+- cpus: This node contains a list of CPU cores, which should match the order
+  of CPU cores used by the WUPCR and PSTR registers in the Advanced Power
+  Management Until section of the device's datasheet.
+
+
+Example:
+
+This shows the r8a7791 APMU that can control CPU0 and CPU1.
+
+	apmu@e6152000 {
+		compatible = "renesas,apmu-r8a7791", "renesas,apmu";
+		reg = <0 0xe6152000 0 0x188>;
+		cpus = <&cpu0 &cpu1>;
+	};

[PATCH 02/04] ARM: shmobile: Add APMU DT support via Enable method

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Allow DT configuration of the APMU hardware in the case when the APMU is
pointed out in the DTB via the enable-method. The ability to configure
the APMU via C code is still kept intact to prevent DTB breakage for older
SoCs that do not rely on the enable-method for SMP support.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 arch/arm/mach-shmobile/platsmp-apmu.c |   89 +++++++++++++++++++++++++++++++--
 1 file changed, 85 insertions(+), 4 deletions(-)

--- 0001/arch/arm/mach-shmobile/platsmp-apmu.c
+++ work/arch/arm/mach-shmobile/platsmp-apmu.c	2015-05-20 22:26:43.152366518 +0900
@@ -24,6 +24,7 @@
 #include <asm/suspend.h>
 #include "common.h"
 #include "platsmp-apmu.h"
+#include "rcar-gen2.h"
 
 static struct {
 	void __iomem *iomem;
@@ -117,15 +118,64 @@ static void apmu_parse_cfg(void (*fn)(st
 	}
 }
 
-void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
-					   struct rcar_apmu_config *apmu_config,
-					   int num)
+static const struct of_device_id apmu_ids[] = {
+	{ .compatible = "renesas,apmu" },
+	{ /*sentinel*/ }
+};
+
+static void apmu_parse_dt(void (*fn)(struct resource *res, int cpu, int bit))
+{
+	struct device_node *np_apmu, *np_cpu;
+	struct resource res;
+	u32 id;
+	int bit, index;
+	bool is_allowed;
+
+	for_each_matching_node(np_apmu, apmu_ids) {
+		/* only enable the cluster that includes the boot CPU */
+		is_allowed = false;
+		for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {
+			np_cpu = of_parse_phandle(np_apmu, "cpus", bit);
+			if (np_cpu) {
+				if (!of_property_read_u32(np_cpu, "reg", &id)) {
+					if (id == cpu_logical_map(0))
+						is_allowed = true;
+				}
+				of_node_put(np_cpu);
+			}
+		}
+		if (!is_allowed)
+			continue;
+
+		for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {
+			np_cpu = of_parse_phandle(np_apmu, "cpus", bit);
+			if (np_cpu) {
+				if (!of_property_read_u32(np_cpu, "reg", &id)) {
+					index = get_logical_index(id);
+					if ((index >= 0) &&
+					    !of_address_to_resource(np_apmu,
+								    0, &res))
+						fn(&res, index, bit);
+				}
+				of_node_put(np_cpu);
+			}
+		}
+		of_node_put(np_apmu);
+	}
+}
+
+static void __init shmobile_smp_apmu_setup_boot(void)
 {
 	/* install boot code shared by all CPUs */
 	shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
 	shmobile_boot_arg = MPIDR_HWID_BITMASK;
+}
 
-	/* perform per-cpu setup */
+void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
+					   struct rcar_apmu_config *apmu_config,
+					   int num)
+{
+	shmobile_smp_apmu_setup_boot();
 	apmu_parse_cfg(apmu_init_cpu, apmu_config, num);
 }
 
@@ -236,3 +286,34 @@ void __init shmobile_smp_apmu_suspend_in
 	shmobile_suspend_ops.enter = shmobile_smp_apmu_enter_suspend;
 }
 #endif
+
+static void __init shmobile_smp_apmu_prepare_cpus_dt(unsigned int max_cpus)
+{
+	shmobile_smp_apmu_setup_boot();
+	apmu_parse_dt(apmu_init_cpu);
+	rcar_gen2_pm_init();
+}
+
+static int shmobile_smp_apmu_boot_secondary_md21(unsigned int cpu,
+						 struct task_struct *idle)
+{
+	/* Error out when hardware debug mode is enabled */
+	if (rcar_gen2_read_mode_pins() & BIT(21)) {
+		pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
+		return -ENOTSUPP;
+	}
+
+	return shmobile_smp_apmu_boot_secondary(cpu, idle);
+}
+
+static struct smp_operations apmu_smp_ops __initdata = {
+	.smp_prepare_cpus	= shmobile_smp_apmu_prepare_cpus_dt,
+	.smp_boot_secondary	= shmobile_smp_apmu_boot_secondary_md21,
+#ifdef CONFIG_HOTPLUG_CPU
+	.cpu_disable		= shmobile_smp_cpu_disable,
+	.cpu_die		= shmobile_smp_apmu_cpu_die,
+	.cpu_kill		= shmobile_smp_apmu_cpu_kill,
+#endif
+};
+
+CPU_METHOD_OF_DECLARE(shmobile_smp_apmu, "renesas,apmu", &apmu_smp_ops);

[PATCH 03/04] ARM: shmobile: Add APMU nodes to r8a7791 DTSI

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Add an APMU DT node for the r8a7791 SoC and use the enable-method to
point out that the APMU should be used for SMP support.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 arch/arm/boot/dts/r8a7791.dtsi |    7 +++++++
 1 file changed, 7 insertions(+)

--- 0001/arch/arm/boot/dts/r8a7791.dtsi
+++ work/arch/arm/boot/dts/r8a7791.dtsi	2015-05-20 22:36:19.432366518 +0900
@@ -42,6 +42,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "renesas,apmu";
 
 		cpu0: cpu@0 {
 			device_type = "cpu";
@@ -69,6 +70,12 @@
 		};
 	};
 
+	apmu@e6152000 {
+		compatible = "renesas,apmu-r8a7791", "renesas,apmu";
+		reg = <0 0xe6152000 0 0x188>;
+		cpus = <&cpu0 &cpu1>;
+	};
+
 	gic: interrupt-controller@f1001000 {
 		compatible = "arm,cortex-a15-gic";
 		#interrupt-cells = <3>;

[PATCH 04/04] ARM: shmobile: Remove r8a7791 non-DT APMU override

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Adjust the r8a7791 SoC support code to not configure any non-DT SMP code
in case the DT-based enable-method has been installed already.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 arch/arm/mach-shmobile/r8a7791.h       |    2 +-
 arch/arm/mach-shmobile/setup-r8a7791.c |    2 +-
 arch/arm/mach-shmobile/smp-r8a7791.c   |   11 ++++++++++-
 3 files changed, 12 insertions(+), 3 deletions(-)

--- 0001/arch/arm/mach-shmobile/r8a7791.h
+++ work/arch/arm/mach-shmobile/r8a7791.h	2015-05-20 22:52:00.602366518 +0900
@@ -1,6 +1,6 @@
 #ifndef __ASM_R8A7791_H__
 #define __ASM_R8A7791_H__
 
-extern struct smp_operations r8a7791_smp_ops;
+bool r8a7791_smp_init(void);
 
 #endif /* __ASM_R8A7791_H__ */
--- 0001/arch/arm/mach-shmobile/setup-r8a7791.c
+++ work/arch/arm/mach-shmobile/setup-r8a7791.c	2015-05-20 22:55:48.172366518 +0900
@@ -29,7 +29,7 @@ static const char *r8a7791_boards_compat
 };
 
 DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
-	.smp		= smp_ops(r8a7791_smp_ops),
+	.smp_init	= r8a7791_smp_init,
 	.init_early	= shmobile_init_delay,
 	.init_time	= rcar_gen2_timer_init,
 	.init_late	= shmobile_init_late,
--- 0001/arch/arm/mach-shmobile/smp-r8a7791.c
+++ work/arch/arm/mach-shmobile/smp-r8a7791.c	2015-05-20 22:57:53.502366518 +0900
@@ -54,7 +54,7 @@ static int r8a7791_smp_boot_secondary(un
 	return shmobile_smp_apmu_boot_secondary(cpu, idle);
 }
 
-struct smp_operations r8a7791_smp_ops __initdata = {
+static struct smp_operations r8a7791_smp_ops __initdata = {
 	.smp_prepare_cpus	= r8a7791_smp_prepare_cpus,
 	.smp_boot_secondary	= r8a7791_smp_boot_secondary,
 #ifdef CONFIG_HOTPLUG_CPU
@@ -63,3 +63,12 @@ struct smp_operations r8a7791_smp_ops __
 	.cpu_kill		= shmobile_smp_apmu_cpu_kill,
 #endif
 };
+
+bool __init r8a7791_smp_init(void)
+{
+	/* only setup when no other DT based method is detected */
+	if (!platform_can_secondary_boot())
+		smp_set_ops(&r8a7791_smp_ops);
+
+	return true;
+}

Re: [PATCH 02/04] ARM: shmobile: Add APMU DT support via Enable method

[Geert Uytterhoeven]

On Thu, May 21, 2015 at 3:22 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
> --- 0001/arch/arm/mach-shmobile/platsmp-apmu.c
> +++ work/arch/arm/mach-shmobile/platsmp-apmu.c  2015-05-20 22:26:43.152366518 +0900

> +static void apmu_parse_dt(void (*fn)(struct resource *res, int cpu, int bit))
> +{
> +       struct device_node *np_apmu, *np_cpu;
> +       struct resource res;
> +       u32 id;
> +       int bit, index;
> +       bool is_allowed;
> +
> +       for_each_matching_node(np_apmu, apmu_ids) {
> +               /* only enable the cluster that includes the boot CPU */
> +               is_allowed = false;

You can declare the variable here instead of at the top of the function.

> +               for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {
> +                       np_cpu = of_parse_phandle(np_apmu, "cpus", bit);
> +                       if (np_cpu) {
> +                               if (!of_property_read_u32(np_cpu, "reg", &id)) {
> +                                       if (id == cpu_logical_map(0))
> +                                               is_allowed = true;

You can do "of_node_put(np_cpu); break;" here, to stop scanning.

> +                               }
> +                               of_node_put(np_cpu);
> +                       }
> +               }
> +               if (!is_allowed)
> +                       continue;

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 02/04] ARM: shmobile: Add APMU DT support via Enable method

[Magnus Damm]

Hi Geert,

On Thu, May 21, 2015 at 5:13 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Thu, May 21, 2015 at 3:22 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> --- 0001/arch/arm/mach-shmobile/platsmp-apmu.c
>> +++ work/arch/arm/mach-shmobile/platsmp-apmu.c  2015-05-20 22:26:43.152366518 +0900
>
>> +static void apmu_parse_dt(void (*fn)(struct resource *res, int cpu, int bit))
>> +{
>> +       struct device_node *np_apmu, *np_cpu;
>> +       struct resource res;
>> +       u32 id;
>> +       int bit, index;
>> +       bool is_allowed;
>> +
>> +       for_each_matching_node(np_apmu, apmu_ids) {
>> +               /* only enable the cluster that includes the boot CPU */
>> +               is_allowed = false;
>
> You can declare the variable here instead of at the top of the function.

Sure, good idea.

>> +               for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {
>> +                       np_cpu = of_parse_phandle(np_apmu, "cpus", bit);
>> +                       if (np_cpu) {
>> +                               if (!of_property_read_u32(np_cpu, "reg", &id)) {
>> +                                       if (id == cpu_logical_map(0))
>> +                                               is_allowed = true;
>
> You can do "of_node_put(np_cpu); break;" here, to stop scanning.

Yes, that's correct. I did not manage to get this update into the V2
series but will do later on in V3.

Thanks!

/ magnus