From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Boyd Subject: Re: [PATCH v3 1/3] clk: mediatek: Fix PLL registers setting flow Date: Fri, 17 Jul 2015 17:47:49 -0700 Message-ID: <20150718004749.GV30412@codeaurora.org> References: <1436517574-17895-1-git-send-email-jamesjj.liao@mediatek.com> <1436517574-17895-2-git-send-email-jamesjj.liao@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1436517574-17895-2-git-send-email-jamesjj.liao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: James Liao Cc: Matthias Brugger , Mike Turquette , Heiko Stubner , srv_heupstream-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, Daniel Kurtz , Ricky Liang , Rob Herring , Sascha Hauer , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: devicetree@vger.kernel.org On 07/10, James Liao wrote: > Write postdiv and pcw settings at the same time for PLLs if postdiv > and pcw settings are on the same register. > > This is need by PLLs such as MT8173 MMPLL and ARM*PLL. > > Signed-off-by: James Liao > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html