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From: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
To: atull <atull@opensource.altera.com>
Cc: gregkh@linuxfoundation.org, hpa@zytor.com, monstr@monstr.eu,
	michal.simek@xilinx.com, rdunlap@infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	pantelis.antoniou@konsulko.com, robh+dt@kernel.org,
	grant.likely@linaro.org, iws@ovro.caltech.edu,
	linux-doc@vger.kernel.org, pavel@denx.de, broonie@kernel.org,
	philip@balister.org, rubini@gnudd.com, s.trumtrar@pengutronix.de,
	jason@lakedaemon.net, kyle.teske@ni.com, nico@linaro.org,
	balbi@ti.com, m.chehab@samsung.com, davidb@codeaurora.org,
	rob@landley.net, davem@davemloft.net, cesarb@cesarb.net,
	sameo@linux.intel.com, akpm@linux-foundation.org,
	linus.walleij@linaro.org, pawel.moll@arm.com,
	mark.rutland@arm.com, ijc+devicetree@hellion.org.uk,
	galak@codeaurora.org, devel@driverdev.osuosl.org,
	Petr Cvek <petr.cvek@tul.cz>,
	delicious.quinoa@gmail.com, dinguyen@opensource.altera.com
Subject: Re: [PATCH v9 0/7] FPGA Manager Framework and Simple FPGA Bus
Date: Wed, 22 Jul 2015 15:11:31 -0600	[thread overview]
Message-ID: <20150722211131.GA23683@obsidianresearch.com> (raw)
In-Reply-To: <alpine.DEB.2.02.1507221529280.19203@linuxheads99>

On Wed, Jul 22, 2015 at 03:32:32PM -0500, atull wrote:

> I looked some more; I don't see a simple way of deferring probing until 
> after the filesystem is loaded (so that the image file would be 
> available), late_initcall is still not late enough.

That seems weird, are you saying you can't use request firmware at all
from a compiled in driver? I don't know much about that flow, sorry.

Having that work would mean the system can have a reasonable in-tree
use case without requiring the out of tree dt overlay stuff.

Jason

  reply	other threads:[~2015-07-22 21:11 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-17 15:51 [PATCH v9 0/7] FPGA Manager Framework and Simple FPGA Bus atull
2015-07-17 15:51 ` [PATCH v9 1/7] staging: usage documentation for FPGA manager core atull
2015-07-23  6:38   ` Pavel Machek
2015-07-17 15:51 ` [PATCH v9 2/7] staging: usage documentation for simple fpga bus atull
2015-07-23  6:43   ` Pavel Machek
2015-07-17 15:51 ` [PATCH v9 3/7] staging: add bindings document " atull
2015-07-17 19:49   ` Steffen Trumtrar
2015-07-17 21:21     ` Jason Gunthorpe
2015-07-17 21:22     ` atull
2015-07-23  7:31       ` Steffen Trumtrar
2015-07-23  6:46   ` Pavel Machek
2015-07-17 15:51 ` [PATCH v9 4/7] staging: fpga manager: add sysfs interface document atull
2015-07-24  8:18   ` Pavel Machek
2015-07-24 12:39     ` atull
2015-07-24 12:43       ` Pavel Machek
2015-07-17 15:51 ` [PATCH v9 5/7] staging: fpga manager core atull
2015-07-17 17:27   ` Randy Dunlap
2015-07-17 18:25     ` atull
2015-07-22 21:47   ` Moritz Fischer
2015-07-23 16:28     ` atull
2015-07-17 15:51 ` [PATCH v9 6/7] staging: add simple-fpga-bus atull
2015-07-23 21:55   ` Moritz Fischer
2015-07-23 22:15     ` Jason Gunthorpe
2015-07-24  3:42       ` atull
2015-07-17 15:51 ` [PATCH v9 7/7] staging: fpga manager: add driver for socfpga fpga manager atull
2015-07-17 21:06   ` Moritz Fischer
2015-07-17 21:42     ` atull
2015-07-17 17:25 ` [PATCH v9 0/7] FPGA Manager Framework and Simple FPGA Bus Jason Gunthorpe
2015-07-17 18:09   ` atull
2015-07-22 20:32     ` atull
2015-07-22 21:11       ` Jason Gunthorpe [this message]
2015-07-22 21:39         ` atull
2015-07-23  4:12 ` Greg KH
2015-07-23 16:37   ` atull

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