From: Stephen Boyd <sboyd@codeaurora.org>
To: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Lee Jones <lee.jones@linaro.org>,
rob.herring@linaro.org, nm@ti.com, arnd.bergmann@linaro.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@stlinux.com,
rjw@rjwysocki.net, linux-pm@vger.kernel.org,
devicetree@vger.kernel.org, ajitpal.singh@st.com, sre@kernel.org,
dbaryshkov@gmail.com
Subject: Re: [PATCH v4 2/2] dt: power: st: Provide bindings for ST's OPPs
Date: Tue, 28 Jul 2015 15:55:10 -0700 [thread overview]
Message-ID: <20150728225510.GB3159@codeaurora.org> (raw)
In-Reply-To: <20150728022936.GB1229@linux>
On 07/28, Viresh Kumar wrote:
> Cc'ing few people (whom I cc'd last time as well :)).
>
> On 27-07-15, 16:20, Lee Jones wrote:
> > These OPPs are used in ST's CPUFreq implementation.
> >
> > Signed-off-by: Lee Jones <lee.jones@linaro.org>
> > ---
> >
> > Changelog:
> > - None, new patch
> >
> > Documentation/devicetree/bindings/power/opp-st.txt | 76 ++++++++++++++++++++++
> > 1 file changed, 76 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/power/opp-st.txt
> >
> > diff --git a/Documentation/devicetree/bindings/power/opp-st.txt b/Documentation/devicetree/bindings/power/opp-st.txt
> > new file mode 100644
> > index 0000000..6eb2a91
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/power/opp-st.txt
> > @@ -0,0 +1,76 @@
> > +STMicroelectronics OPP (Operating Performance Points) Bindings
> > +--------------------------------------------------------------
> > +
> > +Frequency Scaling only
> > +----------------------
> > +
> > +Located in CPU's node:
> > +
> > +- operating-points : [See: ./opp.txt]
> > +
> > +Example [safe]
> > +--------------
> > +
> > +cpus {
> > + cpu@0 {
> > + /* kHz uV */
> > + operating-points = <1500000 0
> > + 1200000 0
> > + 800000 0
> > + 500000 0>;
> > + };
> > +};
> > +
> > +Dynamic Voltage and Frequency Scaling (DVFS)
> > +--------------------------------------------
> > +
> > +Located in 'cpu0-opp-list' node [to be provided ONLY by the bootloader]:
> > +
> > +- compatible : Should be "operating-points-v2-sti"
> > +- opp{1..N} : Each 'oppX' subnode will contain the following properties:
>
> Or should we mention:
> - opp{1..N} : Each 'oppX' subnode shall contain below properties,
> over what ./opp.txt defines:
>
> ?
>
>
> > + - opp-hz : CPU frequency [Hz] for this OPP [See: ./opp.txt]
> > + - st,avs : List of available voltages [uV] indexed by process code
> > + - st,cuts : Cut version this OPP is suitable for [0xFF means ALL]
> > + - st,substrate : Substrate version this OPP is suitable for [0xFF means ALL]
> > +- st,syscfg : Phandle to Major number register
> > + First cell: offset to major number
> > +- st,syscfg-eng : Phandle to Minor number and Pcode registers
> > + First cell: offset to process code
> > + Second cell: offset to minor number
> > +
> > +WARNING: The opp{1..N} nodes will be provided by the bootloader. Do not attempt to
> > + artificially synthesise the opp{1..N} nodes or any of their descendants.
> > + They are very platform specific and may damage the hardware if created
> > + incorrectly.
> > +
> > +Example [unsafe]
> > +----------------
> > +
> > +cpus {
> > + cpu@0 {
> > + operating-points-v2 = <&cpu0_opp_list>;
> > + };
> > +};
> > +
> > +/* ############################################################ */
> > +/* # WARNING: Do not attempt to copy/replicate this node, # */
> > +/* # it is only to be supplied by the bootloader !!! # */
> > +/* ############################################################ */
> > +cpu0-opp-list {
> > + compatible = "operating-points-v2-sti";
> > + st,syscfg = <&syscfg [major_offset]>;
> > + st,syscfg-eng = <&syscfg_eng [pcode_offset] [minor_offset]>;
> > +
> > + opp0 {
> > + opp-hz = <1200000000>;
> > + st,avs = <1110 1150 1100 1080 1040 1020 980 930>;
> > + st,substrate = <0xff>;
> > + st,cuts = <0xff>;
> > + };
> > + opp1 {
> > + opp-hz = <1500000000>;
> > + st,avs = <1200 1200 1200 1200 1170 1140 1100 1070>;
> > + st,substrate = <0xff>;
> > + st,cuts = <0x2>;
> > + };
> > +};
>
> I don't see more problems here, unless we can move some of this to the
> generic bindings.
>
> @Rob/Stephen: Please respond before it is late :)
>
It's interesting to have vendor specific properties like avs,
cuts, and substrate. That could replace our planned usage of the
opp-names property where we encode similar information (speed
bin, revision, etc.) into a string that we look for.
So I wonder why the avs/cut/substrate information can't be
encoded into the opp name? That would make these properties
obsolete, given that all they're used for is to pick out the
correct OPP?
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2015-07-28 22:55 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-27 15:20 [PATCH v4 1/2] dt: cpufreq: st: Provide bindings for ST's CPUFreq implementation Lee Jones
2015-07-27 15:20 ` [PATCH v4 2/2] dt: power: st: Provide bindings for ST's OPPs Lee Jones
2015-07-28 2:29 ` Viresh Kumar
2015-07-28 7:34 ` Lee Jones
2015-07-28 7:47 ` Viresh Kumar
2015-07-28 8:30 ` Lee Jones
2015-07-28 22:55 ` Stephen Boyd [this message]
2015-07-29 8:14 ` Lee Jones
2015-07-29 22:15 ` Stephen Boyd
2015-07-30 8:46 ` Lee Jones
2015-07-30 16:16 ` Rob Herring
2015-07-31 16:37 ` Stephen Boyd
2015-08-01 11:36 ` Viresh Kumar
2015-08-03 3:46 ` Viresh Kumar
2015-08-10 13:22 ` Lee Jones
2015-08-11 8:00 ` Viresh Kumar
2015-08-11 9:30 ` Lee Jones
2015-08-11 10:09 ` Viresh Kumar
2015-08-11 11:54 ` Lee Jones
2015-08-11 12:01 ` Viresh Kumar
2015-08-11 13:27 ` Lee Jones
2015-08-11 14:28 ` Viresh Kumar
2015-08-11 15:17 ` Lee Jones
2015-08-12 11:08 ` Viresh Kumar
2015-08-26 12:06 ` Lee Jones
2015-09-02 8:06 ` Viresh Kumar
2015-09-02 18:58 ` Rob Herring
2015-09-09 6:27 ` Viresh Kumar
2015-09-09 7:59 ` Lee Jones
2015-09-09 8:30 ` Viresh Kumar
2015-09-09 13:39 ` Lee Jones
2015-09-09 16:02 ` Viresh Kumar
2015-09-09 16:36 ` Lee Jones
2015-09-09 23:50 ` Rob Herring
2015-09-10 0:57 ` Stephen Boyd
2015-09-10 1:04 ` Viresh Kumar
2015-09-10 8:31 ` Lee Jones
2015-09-16 4:33 ` Viresh Kumar
2015-09-16 6:52 ` Lee Jones
[not found] ` <1438010430-5802-2-git-send-email-lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-07-28 13:55 ` Rob Herring
[not found] ` <CAL_JsqL=e+fL_67_GPKjt_7wJ81GfFx7m9gjxmBDvW_JBXWpfQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-07-28 14:39 ` Lee Jones
2015-07-28 15:35 ` Rob Herring
2015-07-28 15:43 ` Lee Jones
2015-07-28 2:23 ` [PATCH v4 1/2] dt: cpufreq: st: Provide bindings for ST's CPUFreq implementation Viresh Kumar
2015-07-28 7:41 ` Lee Jones
2015-07-28 7:50 ` Viresh Kumar
2015-07-28 8:35 ` Viresh Kumar
2015-07-28 8:55 ` Lee Jones
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150728225510.GB3159@codeaurora.org \
--to=sboyd@codeaurora.org \
--cc=ajitpal.singh@st.com \
--cc=arnd.bergmann@linaro.org \
--cc=dbaryshkov@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=kernel@stlinux.com \
--cc=lee.jones@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=nm@ti.com \
--cc=rjw@rjwysocki.net \
--cc=rob.herring@linaro.org \
--cc=sre@kernel.org \
--cc=viresh.kumar@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).