From: Lee Jones <lee.jones@linaro.org>
To: Peter Griffin <peter.griffin@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, srinivas.kandagatla@gmail.com,
maxime.coquelin@st.com, patrice.chotard@st.com,
devicetree@vger.kernel.org,
Fabrice Gasnier <fabrice.gasnier@st.com>
Subject: Re: [PATCH 07/11] ARM: DT: STiH407: Add systrace pin configuration
Date: Fri, 11 Sep 2015 19:00:48 +0100 [thread overview]
Message-ID: <20150911180048.GK18779@x1> (raw)
In-Reply-To: <1441991194-11948-8-git-send-email-peter.griffin@linaro.org>
On Fri, 11 Sep 2015, Peter Griffin wrote:
> This patch adds the pin config for systrace for
> STiH407 family silicon.
>
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> ---
> arch/arm/boot/dts/stih407-pinctrl.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
Besides the SoBs, which are a little confusing:
Acked-by: Lee Jones <lee.jones@linaro.org>
> diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi
> index cde776b..798d901 100644
> --- a/arch/arm/boot/dts/stih407-pinctrl.dtsi
> +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi
> @@ -658,6 +658,18 @@
> };
> };
> };
> +
> + systrace {
> + pinctrl_systrace_default: systrace-default {
> + st,pins {
> + trc_data0 = <&pio11 3 ALT5 OUT>;
> + trc_data1 = <&pio11 4 ALT5 OUT>;
> + trc_data2 = <&pio11 5 ALT5 OUT>;
> + trc_data3 = <&pio11 6 ALT5 OUT>;
> + trc_clk = <&pio11 7 ALT5 OUT>;
> + };
> + };
> + };
> };
>
> pin-controller-front1 {
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
next prev parent reply other threads:[~2015-09-11 18:00 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-11 17:06 [PATCH 00/11] ARM: STi: STiH407: Pinctrl updates Peter Griffin
2015-09-11 17:06 ` [PATCH 01/11] ARM: STi: DT: STiH407: Add a cec0 pin definition Peter Griffin
[not found] ` <1441991194-11948-2-git-send-email-peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-09-11 18:03 ` Lee Jones
2015-09-11 17:06 ` [PATCH 02/11] ARM: STi: DT: STiH407: Add i2c3 alternate pin configs Peter Griffin
[not found] ` <1441991194-11948-3-git-send-email-peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-09-11 18:02 ` Lee Jones
2015-09-11 17:06 ` [PATCH 03/11] ARM: DT: STiH407: Add SPI 3 wire and 4 wire pinctrl configs Peter Griffin
2015-09-11 18:02 ` Lee Jones
2015-09-11 17:06 ` [PATCH 04/11] ARM: DT: STiH407: Add serial3 pinctrl configuration Peter Griffin
2015-09-11 18:01 ` Lee Jones
2015-09-11 17:06 ` [PATCH 05/11] ARM: DT: STiH407: Add SPI FSM (NOR Flash) Controller pin config Peter Griffin
2015-09-11 18:01 ` Lee Jones
2015-09-11 17:06 ` [PATCH 06/11] ARM: DT: STiH407: Add NAND flash controller pin configuration Peter Griffin
[not found] ` <1441991194-11948-7-git-send-email-peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-09-11 18:01 ` Lee Jones
2015-09-11 17:06 ` [PATCH 07/11] ARM: DT: STiH407: Add systrace " Peter Griffin
2015-09-11 18:00 ` Lee Jones [this message]
2015-09-11 17:06 ` [PATCH 08/11] ARM: DT: STiH407: Add SD pinctrl config for mmc0 controller Peter Griffin
2015-09-11 18:00 ` Lee Jones
2015-09-11 17:06 ` [PATCH 09/11] ARM: DT: STiH407: Add pinconfig for IRB UHF and IRB TX Peter Griffin
2015-09-11 17:57 ` Lee Jones
[not found] ` <1441991194-11948-1-git-send-email-peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-09-11 17:06 ` [PATCH 10/11] ARM: DT: STiH407: Add RMII pinctrl support Peter Griffin
2015-09-11 17:57 ` Lee Jones
2015-09-11 17:06 ` [PATCH 11/11] ARM: STi: STiH407: Add spi default pinctrl groups Peter Griffin
2015-09-11 17:56 ` Lee Jones
2015-09-14 12:32 ` [PATCH 00/11] ARM: STi: STiH407: Pinctrl updates Patrice Chotard
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