[PATCH v3 00/09] ARM: shmobile: APMU DT support via SMP Enable method V3

[PATCH v3 00/09] ARM: shmobile: APMU DT support via SMP Enable method V3

[Magnus Damm]

ARM: shmobile: APMU DT support via SMP Enable method V3

[PATCH v3 01/09] devicetree: bindings: Renesas APMU and SMP Enable method
[PATCH v3 02/09] ARM: shmobile: Add APMU DT support via Enable method
[PATCH v3 03/09] ARM: shmobile: Add APMU nodes to r8a7793 DTSI
[PATCH v3 04/09] ARM: shmobile: r8a7793 boot address update
[PATCH v3 05/09] ARM: shmobile: Add APMU nodes to r8a7790 DTSI
[PATCH v3 06/09] ARM: shmobile: Add APMU nodes to r8a7791 DTSI
[PATCH v3 07/09] ARM: shmobile: Add function to prioritize DT SMP
[PATCH v3 08/09] ARM: shmobile: Prioritize r8a7790 DT APMU support
[PATCH v3 09/09] ARM: shmobile: Prioritize r8a7791 DT APMU support

These patches add DT support for the APMU hardware commonly found in
Renesas R-Car Gen2 SoCs. Without these patches the APMU gets configured
through data expressed in C, and with this series applied it is possible
to describe the APMU configuration in DT and let the enable method point
out that the APMU should be used.

Patch 1 and 2 are Documenting and adding DT support to the APMU driver
together with enabling use of the enable-method way to describe that
the APMU hardware is needed for SMP operation.

Patch 3 and 4 add r8a7793 SMP support using this the new APMU DT interface.

Patch 5 and 6 are related to r8a7790/r8a7791 support that get a DTSI update
to describe the APMU hardware. To avoid breaking support for older DTBs out
in the wild these patches keep the older existing C code APMU configuration
as-is. Patch 7-9 make sure that during run-time, if the APMU is installed
via the DT enable-method then it will not be overriden by older non-DT
configuration.

I suggest making APMU DT configuration mandatory for SMP operation on
newer SoCs and that we keep the old APMU support code in place for a
good number of kernel releases or until we can identify a couple of major
reasons good enough to force a DTB update on the end users.

In the future r8a7794 support may be added by using code similar to
patch 3 and 4 - without any C-based SMP code and fallback.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Written against renesas-drivers-2015-09-15-v4.3-rc1
 
 Documentation/devicetree/bindings/arm/cpus.txt           |    1 
 Documentation/devicetree/bindings/power/renesas,apmu.txt |   31 ++++
 arch/arm/boot/dts/r8a7790.dtsi                           |   13 +
 arch/arm/boot/dts/r8a7791.dtsi                           |    7 +
 arch/arm/boot/dts/r8a7793.dtsi                           |   14 ++
 arch/arm/mach-shmobile/common.h                          |    1 
 arch/arm/mach-shmobile/platsmp-apmu.c                    |   92 +++++++++++++-
 arch/arm/mach-shmobile/platsmp.c                         |    7 +
 arch/arm/mach-shmobile/pm-rcar-gen2.c                    |    5 
 arch/arm/mach-shmobile/setup-r8a7790.c                   |    1 
 arch/arm/mach-shmobile/setup-r8a7791.c                   |    1 
 11 files changed, 168 insertions(+), 5 deletions(-)

[PATCH v3 01/09] devicetree: bindings: Renesas APMU and SMP Enable method

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Add DT binding documentation for the APMU hardware and add "renesas,apmu"
to the list of enable methods for the ARM cpus.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Changes since V2:
 - s/Until/Unit/g - thanks Geert!

 Changes since V1:
 - None

 Documentation/devicetree/bindings/arm/cpus.txt           |    1 
 Documentation/devicetree/bindings/power/renesas,apmu.txt |   31 ++++++++++++++
 2 files changed, 32 insertions(+)

--- 0001/Documentation/devicetree/bindings/arm/cpus.txt
+++ work/Documentation/devicetree/bindings/arm/cpus.txt	2015-09-16 20:32:46.710513000 +0900
@@ -198,6 +198,7 @@ nodes to be present and contain the prop
 			    "qcom,gcc-msm8660"
 			    "qcom,kpss-acc-v1"
 			    "qcom,kpss-acc-v2"
+			    "renesas,apmu"
 			    "rockchip,rk3066-smp"
 			    "ste,dbx500-smp"
 
--- /dev/null
+++ work/Documentation/devicetree/bindings/power/renesas,apmu.txt	2015-09-16 20:42:09.000513000 +0900
@@ -0,0 +1,31 @@
+DT bindings for the Renesas Advanced Power Management Unit
+
+Renesas R-Car line of SoCs utilize one or more APMU hardware units
+for CPU core power domain control including SMP boot and CPU Hotplug.
+
+Required properties:
+
+- compatible: Should be "renesas,apmu-<soctype>", "renesas,apmu" as fallback.
+	      Examples with soctypes are:
+		- "renesas,apmu-r8a7790" (R-Car H2)
+		- "renesas,apmu-r8a7791" (R-Car M2-W)
+		- "renesas,apmu-r8a7792" (R-Car V2H)
+		- "renesas,apmu-r8a7793" (R-Car M2-N)
+		- "renesas,apmu-r8a7794" (R-Car E2)
+
+- reg: Base address and length of the I/O registers used by the APMU.
+
+- cpus: This node contains a list of CPU cores, which should match the order
+  of CPU cores used by the WUPCR and PSTR reigsters in the Advanced Power
+  Management Unit section of the device's datasheet.
+
+
+Example:
+
+This shows the r8a7791 APMU that can control CPU0 and CPU1.
+
+	apmu@e6152000 {
+		compatible = "renesas,apmu-r8a7791", "renesas,apmu";
+		reg = <0 0xe6152000 0 0x188>;
+		cpus = <&cpu0 &cpu1>;
+	};

[PATCH v3 02/09] ARM: shmobile: Add APMU DT support via Enable method

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Allow DT configuration of the APMU hardware in the case when the APMU is
pointed out in the DTB via the enable-method. The ability to configure
the APMU via C code is still kept intact to prevent DTB breakage for older
SoCs that do not rely on the enable-method for SMP support.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Changes since V2:
 - Moved is_allowed declaration, break when allowed - thanks Geert!

 Changes since V1:
 - Adjusted to use .cpu_can_disable instead of .cpu_disable

 arch/arm/mach-shmobile/platsmp-apmu.c |   92 +++++++++++++++++++++++++++++++--
 1 file changed, 88 insertions(+), 4 deletions(-)

--- 0001/arch/arm/mach-shmobile/platsmp-apmu.c
+++ work/arch/arm/mach-shmobile/platsmp-apmu.c	2015-09-16 20:46:23.400513000 +0900
@@ -24,6 +24,7 @@
 #include <asm/suspend.h>
 #include "common.h"
 #include "platsmp-apmu.h"
+#include "rcar-gen2.h"
 
 static struct {
 	void __iomem *iomem;
@@ -117,15 +118,67 @@ static void apmu_parse_cfg(void (*fn)(st
 	}
 }
 
-void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
-					   struct rcar_apmu_config *apmu_config,
-					   int num)
+static const struct of_device_id apmu_ids[] = {
+	{ .compatible = "renesas,apmu" },
+	{ /*sentinel*/ }
+};
+
+static void apmu_parse_dt(void (*fn)(struct resource *res, int cpu, int bit))
+{
+	struct device_node *np_apmu, *np_cpu;
+	struct resource res;
+	u32 id;
+	int bit, index;
+
+	for_each_matching_node(np_apmu, apmu_ids) {
+		/* only enable the cluster that includes the boot CPU */
+		bool is_allowed = false;
+		for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {
+			np_cpu = of_parse_phandle(np_apmu, "cpus", bit);
+			if (np_cpu) {
+				if (!of_property_read_u32(np_cpu, "reg", &id)) {
+					if (id == cpu_logical_map(0)) {
+						is_allowed = true;
+						of_node_put(np_cpu);
+						break;
+					}
+						
+				}
+				of_node_put(np_cpu);
+			}
+		}
+		if (!is_allowed)
+			continue;
+
+		for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {
+			np_cpu = of_parse_phandle(np_apmu, "cpus", bit);
+			if (np_cpu) {
+				if (!of_property_read_u32(np_cpu, "reg", &id)) {
+					index = get_logical_index(id);
+					if ((index >= 0) &&
+					    !of_address_to_resource(np_apmu,
+								    0, &res))
+						fn(&res, index, bit);
+				}
+				of_node_put(np_cpu);
+			}
+		}
+		of_node_put(np_apmu);
+	}
+}
+
+static void __init shmobile_smp_apmu_setup_boot(void)
 {
 	/* install boot code shared by all CPUs */
 	shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
 	shmobile_boot_arg = MPIDR_HWID_BITMASK;
+}
 
-	/* perform per-cpu setup */
+void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
+					   struct rcar_apmu_config *apmu_config,
+					   int num)
+{
+	shmobile_smp_apmu_setup_boot();
 	apmu_parse_cfg(apmu_init_cpu, apmu_config, num);
 }
 
@@ -236,3 +289,34 @@ void __init shmobile_smp_apmu_suspend_in
 	shmobile_suspend_ops.enter = shmobile_smp_apmu_enter_suspend;
 }
 #endif
+
+static void __init shmobile_smp_apmu_prepare_cpus_dt(unsigned int max_cpus)
+{
+	shmobile_smp_apmu_setup_boot();
+	apmu_parse_dt(apmu_init_cpu);
+	rcar_gen2_pm_init();
+}
+
+static int shmobile_smp_apmu_boot_secondary_md21(unsigned int cpu,
+						 struct task_struct *idle)
+{
+	/* Error out when hardware debug mode is enabled */
+	if (rcar_gen2_read_mode_pins() & BIT(21)) {
+		pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
+		return -ENOTSUPP;
+	}
+
+	return shmobile_smp_apmu_boot_secondary(cpu, idle);
+}
+
+static struct smp_operations apmu_smp_ops __initdata = {
+	.smp_prepare_cpus	= shmobile_smp_apmu_prepare_cpus_dt,
+	.smp_boot_secondary	= shmobile_smp_apmu_boot_secondary_md21,
+#ifdef CONFIG_HOTPLUG_CPU
+	.cpu_can_disable	= shmobile_smp_cpu_can_disable,
+	.cpu_die		= shmobile_smp_apmu_cpu_die,
+	.cpu_kill		= shmobile_smp_apmu_cpu_kill,
+#endif
+};
+
+CPU_METHOD_OF_DECLARE(shmobile_smp_apmu, "renesas,apmu", &apmu_smp_ops);

[PATCH v3 03/09] ARM: shmobile: Add APMU nodes to r8a7793 DTSI

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Add an APMU DT node for the r8a7793 SoC and use the enable-method to
point out that the APMU should be used for SMP support.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Changes from V2:
 - New patch

 arch/arm/boot/dts/r8a7793.dtsi |   14 ++++++++++++++
 1 file changed, 14 insertions(+)

--- 0001/arch/arm/boot/dts/r8a7793.dtsi
+++ work/arch/arm/boot/dts/r8a7793.dtsi	2015-09-16 20:53:27.660513000 +0900
@@ -21,6 +21,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "renesas,apmu";
 
 		cpu0: cpu@0 {
 			device_type = "cpu";
@@ -39,6 +40,19 @@
 					   < 750000 1000000>,
 					   < 375000 1000000>;
 		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <1>;
+			clock-frequency = <1500000000>;
+		};
+	};
+
+	apmu@e6152000 {
+		compatible = "renesas,apmu-r8a7793", "renesas,apmu";
+		reg = <0 0xe6152000 0 0x188>;
+		cpus = <&cpu0 &cpu1>;
 	};
 
 	gic: interrupt-controller@f1001000 {

[PATCH v3 04/09] ARM: shmobile: r8a7793 boot address update

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Extend the R-Car Gen2 PM code to include r8a7793 boot address
configuration information. r8a7793 boots from ICRAM1.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Changes from V2:
 - New patch

 arch/arm/mach-shmobile/pm-rcar-gen2.c |    5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

--- 0001/arch/arm/mach-shmobile/pm-rcar-gen2.c
+++ work/arch/arm/mach-shmobile/pm-rcar-gen2.c	2015-09-16 22:08:12.610513000 +0900
@@ -28,6 +28,7 @@
 /* On-chip RAM */
 #define MERAM		0xe8080000
 #define RAM		0xe6300000
+#define ICRAM1		0xe63c0000
 
 /* SYSC */
 #define SYSCIER 0x0c
@@ -78,10 +79,12 @@ void __init rcar_gen2_pm_init(void)
 	if (of_machine_is_compatible("renesas,r8a7790")) {
 		boot_vector_addr = MERAM;
 		syscier = 0x013111ef;
-
 	} else if (of_machine_is_compatible("renesas,r8a7791")) {
 		boot_vector_addr = RAM;
 		syscier = 0x00111003;
+	} else if (of_machine_is_compatible("renesas,r8a7793")) {
+		boot_vector_addr = ICRAM1;
+		syscier = 0x00111003;
 	}
 
 	/* RAM for jump stub, because BAR requires 256KB aligned address */

[PATCH v3 05/09] ARM: shmobile: Add APMU nodes to r8a7790 DTSI

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Add an APMU DT node for the r8a7790 SoC and use the enable-method to
point out that the APMU should be used for SMP support.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Changes from V2:
 - None

 Changes from V1:
 - New patch

 arch/arm/boot/dts/r8a7790.dtsi |   13 +++++++++++++
 1 file changed, 13 insertions(+)

--- 0001/arch/arm/boot/dts/r8a7790.dtsi
+++ work/arch/arm/boot/dts/r8a7790.dtsi	2015-08-23 15:51:24.132366518 +0900
@@ -43,6 +43,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "renesas,apmu";
 
 		cpu0: cpu@0 {
 			device_type = "cpu";
@@ -112,6 +113,18 @@
 		};
 	};
 
+	apmu@e6151000 {
+		compatible = "renesas,apmu-r8a7790", "renesas,apmu";
+		reg = <0 0xe6151000 0 0x188>;
+		cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
+	};
+
+	apmu@e6152000 {
+		compatible = "renesas,apmu-r8a7790", "renesas,apmu";
+		reg = <0 0xe6152000 0 0x188>;
+		cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
+	};
+
 	gic: interrupt-controller@f1001000 {
 		compatible = "arm,gic-400";
 		#interrupt-cells = <3>;

[PATCH v3 06/09] ARM: shmobile: Add APMU nodes to r8a7791 DTSI

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Add an APMU DT node for the r8a7791 SoC and use the enable-method to
point out that the APMU should be used for SMP support.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Changes from V2:
 - None

 Changes from V1:
 - None

 arch/arm/boot/dts/r8a7791.dtsi |    7 +++++++
 1 file changed, 7 insertions(+)

--- 0001/arch/arm/boot/dts/r8a7791.dtsi
+++ work/arch/arm/boot/dts/r8a7791.dtsi	2015-08-23 15:42:10.522366518 +0900
@@ -42,6 +42,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "renesas,apmu";
 
 		cpu0: cpu@0 {
 			device_type = "cpu";
@@ -69,6 +70,12 @@
 		};
 	};
 
+	apmu@e6152000 {
+		compatible = "renesas,apmu-r8a7791", "renesas,apmu";
+		reg = <0 0xe6152000 0 0x188>;
+		cpus = <&cpu0 &cpu1>;
+	};
+
 	gic: interrupt-controller@f1001000 {
 		compatible = "arm,gic-400";
 		#interrupt-cells = <3>;

[PATCH v3 07/09] ARM: shmobile: Add function to prioritize DT SMP

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Add a function to check if other DT based method is available, and
if so return false to not hook up smp_ops from the machine vector.

This results in that DT-based SMP support has priority over older
C-based smp_ops code, and in case DT-based SMP support code does not
exist in the DTB then the old smp_ops code will still work as-is.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Changes since V2:
 - None

 Changes since V1:
 - Reworked r8a7791-specific version to become reusable function.

 arch/arm/mach-shmobile/common.h  |    1 +
 arch/arm/mach-shmobile/platsmp.c |    7 +++++++
 2 files changed, 8 insertions(+)

--- 0001/arch/arm/mach-shmobile/common.h
+++ work/arch/arm/mach-shmobile/common.h	2015-08-23 15:26:18.722366518 +0900
@@ -11,6 +11,7 @@ extern void shmobile_smp_sleep(void);
 extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn,
 			      unsigned long arg);
 extern bool shmobile_smp_cpu_can_disable(unsigned int cpu);
+extern bool shmobile_smp_init_fallback_ops(void);
 extern void shmobile_boot_scu(void);
 extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus);
 extern void shmobile_smp_scu_cpu_die(unsigned int cpu);
--- 0001/arch/arm/mach-shmobile/platsmp.c
+++ work/arch/arm/mach-shmobile/platsmp.c	2015-08-23 15:26:13.692366518 +0900
@@ -36,3 +36,10 @@ bool shmobile_smp_cpu_can_disable(unsign
 	return true; /* Hotplug of any CPU is supported */
 }
 #endif
+
+bool __init shmobile_smp_init_fallback_ops(void)
+{
+	/* fallback on PSCI/smp_ops if no other DT based method is detected */
+	return platform_can_secondary_boot() ? true : false;
+}
+

[PATCH v3 08/09] ARM: shmobile: Prioritize r8a7790 DT APMU support

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Adjust the r8a7790 SoC support code to not configure any non-DT SMP code
in case the DT-based enable-method has been installed already.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Changes since V2:
 - None

 Changes since V1:
 - New patch.

 arch/arm/mach-shmobile/setup-r8a7790.c |    1 +
 1 file changed, 1 insertion(+)

--- 0001/arch/arm/mach-shmobile/setup-r8a7790.c
+++ work/arch/arm/mach-shmobile/setup-r8a7790.c	2015-08-23 15:44:29.102366518 +0900
@@ -28,6 +28,7 @@ static const char * const r8a7790_boards
 };
 
 DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
+	.smp_init	= shmobile_smp_init_fallback_ops,
 	.smp		= smp_ops(r8a7790_smp_ops),
 	.init_early	= shmobile_init_delay,
 	.init_time	= rcar_gen2_timer_init,

[PATCH v3 09/09] ARM: shmobile: Prioritize r8a7791 DT APMU support

[Magnus Damm]

From: Magnus Damm <damm+renesas-yzvPICuk2ACczHhG9Qg4qA@public.gmane.org>

Adjust the r8a7791 SoC support code to not configure any non-DT SMP code
in case the DT-based enable-method has been installed already.

Signed-off-by: Magnus Damm <damm+renesas-yzvPICuk2ACczHhG9Qg4qA@public.gmane.org>
---

 Changes since V2:
 - None

 Changes since V1:
 - Broke out bits from former r8a7791-specific patch.

 arch/arm/mach-shmobile/setup-r8a7791.c |    1 +
 1 file changed, 1 insertion(+)

--- 0001/arch/arm/mach-shmobile/setup-r8a7791.c
+++ work/arch/arm/mach-shmobile/setup-r8a7791.c	2015-08-23 15:46:53.002366518 +0900
@@ -29,6 +29,7 @@ static const char *const r8a7791_boards_
 };
 
 DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
+	.smp_init	= shmobile_smp_init_fallback_ops,
 	.smp		= smp_ops(r8a7791_smp_ops),
 	.init_early	= shmobile_init_delay,
 	.init_time	= rcar_gen2_timer_init,
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Re: [PATCH v3 00/09] ARM: shmobile: APMU DT support via SMP Enable method V3

[Geert Uytterhoeven]

Hi Magnus,

On Thu, Sep 17, 2015 at 8:32 AM, Magnus Damm <magnus.damm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> ARM: shmobile: APMU DT support via SMP Enable method V3
>
> [PATCH v3 01/09] devicetree: bindings: Renesas APMU and SMP Enable method
> [PATCH v3 02/09] ARM: shmobile: Add APMU DT support via Enable method
> [PATCH v3 03/09] ARM: shmobile: Add APMU nodes to r8a7793 DTSI
> [PATCH v3 04/09] ARM: shmobile: r8a7793 boot address update
> [PATCH v3 05/09] ARM: shmobile: Add APMU nodes to r8a7790 DTSI
> [PATCH v3 06/09] ARM: shmobile: Add APMU nodes to r8a7791 DTSI
> [PATCH v3 07/09] ARM: shmobile: Add function to prioritize DT SMP
> [PATCH v3 08/09] ARM: shmobile: Prioritize r8a7790 DT APMU support
> [PATCH v3 09/09] ARM: shmobile: Prioritize r8a7791 DT APMU support

Thanks for your series!

> via the DT enable-method then it will not be overriden by older non-DT

overridden (thanks, checkpatch.pl!)

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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Re: [PATCH v3 02/09] ARM: shmobile: Add APMU DT support via Enable method

[Geert Uytterhoeven]

Hi Magnus,

On Thu, Sep 17, 2015 at 8:33 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
> --- 0001/arch/arm/mach-shmobile/platsmp-apmu.c
> +++ work/arch/arm/mach-shmobile/platsmp-apmu.c  2015-09-16 20:46:23.400513000 +0900
> @@ -24,6 +24,7 @@
>  #include <asm/suspend.h>
>  #include "common.h"
>  #include "platsmp-apmu.h"
> +#include "rcar-gen2.h"
>
>  static struct {
>         void __iomem *iomem;
> @@ -117,15 +118,67 @@ static void apmu_parse_cfg(void (*fn)(st
>         }
>  }
>
> -void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
> -                                          struct rcar_apmu_config *apmu_config,
> -                                          int num)
> +static const struct of_device_id apmu_ids[] = {
> +       { .compatible = "renesas,apmu" },
> +       { /*sentinel*/ }
> +};
> +
> +static void apmu_parse_dt(void (*fn)(struct resource *res, int cpu, int bit))
> +{
> +       struct device_node *np_apmu, *np_cpu;
> +       struct resource res;
> +       u32 id;
> +       int bit, index;
> +
> +       for_each_matching_node(np_apmu, apmu_ids) {
> +               /* only enable the cluster that includes the boot CPU */
> +               bool is_allowed = false;
> +               for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {
> +                       np_cpu = of_parse_phandle(np_apmu, "cpus", bit);
> +                       if (np_cpu) {
> +                               if (!of_property_read_u32(np_cpu, "reg", &id)) {
> +                                       if (id == cpu_logical_map(0)) {
> +                                               is_allowed = true;
> +                                               of_node_put(np_cpu);
> +                                               break;
> +                                       }
> +

Trailing whitespace (thanks, checkpatch.pl!)

> +                               }
> +                               of_node_put(np_cpu);
> +                       }
> +               }
> +               if (!is_allowed)
> +                       continue;
> +
> +               for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {
> +                       np_cpu = of_parse_phandle(np_apmu, "cpus", bit);
> +                       if (np_cpu) {
> +                               if (!of_property_read_u32(np_cpu, "reg", &id)) {
> +                                       index = get_logical_index(id);
> +                                       if ((index >= 0) &&
> +                                           !of_address_to_resource(np_apmu,
> +                                                                   0, &res))
> +                                               fn(&res, index, bit);
> +                               }
> +                               of_node_put(np_cpu);
> +                       }
> +               }
> +               of_node_put(np_apmu);

ERROR: Bad of_node_put() on /apmu@e6152000
CPU: 0 PID: 1 Comm: swapper/0 Not tainted
4.3.0-rc3-koelsch-02290-gca074b0726212a2f #1797
Hardware name: Generic R8A7791 (Flattened Device Tree)
[<c0017e9c>] (unwind_backtrace) from [<c00139f8>] (show_stack+0x10/0x14)
[<c00139f8>] (show_stack) from [<c01efd24>] (dump_stack+0x70/0x8c)
[<c01efd24>] (dump_stack) from [<c01f1eec>] (kobject_release+0x12c/0x19c)
[<c01f1eec>] (kobject_release) from [<c032a89c>]
(of_find_matching_node_and_match+0x78/0x90)
[<c032a89c>] (of_find_matching_node_and_match) from [<c062e424>]
(shmobile_smp_apmu_prepare_cpus_dt+0x150/0x178)
[<c062e424>] (shmobile_smp_apmu_prepare_cpus_dt) from [<c0626c98>]
(kernel_init_freeable+0x60/0x1e4)

for_each_matching_node() takes care of calling of_node_put() on each
element iterated over, cfr. of_find_matching_node_and_match().

> +       }

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v3 02/09] ARM: shmobile: Add APMU DT support via Enable method

[Geert Uytterhoeven]

Hi Magnus,

On Thu, Sep 17, 2015 at 8:33 AM, Magnus Damm <magnus.damm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> --- 0001/arch/arm/mach-shmobile/platsmp-apmu.c
> +++ work/arch/arm/mach-shmobile/platsmp-apmu.c  2015-09-16 20:46:23.400513000 +0900

> +static void __init shmobile_smp_apmu_prepare_cpus_dt(unsigned int max_cpus)
> +{
> +       shmobile_smp_apmu_setup_boot();
> +       apmu_parse_dt(apmu_init_cpu);
> +       rcar_gen2_pm_init();
> +}

The non-DT code in arch/arm/mach-shmobile/smp-r8a7790.c has two calls to
rcar_sysc_power_up() here, cfr.:

        static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
        {
               /* let APMU code install data related to shmobile_boot_vector */
               shmobile_smp_apmu_prepare_cpus(max_cpus,
                                              r8a7790_apmu_config,
                                              ARRAY_SIZE(r8a7790_apmu_config));

                /* turn on power to SCU */
                rcar_gen2_pm_init();
===>            rcar_sysc_power_up(&r8a7790_ca15_scu);
===>            rcar_sysc_power_up(&r8a7790_ca7_scu);
        }

The non-DT code in arch/arm/mach-shmobile/smp-r8a7791.c does not have such
a call for its CA15 cluster.

Does that mean they're not needed on Gen2 in general, and that they can be
removed? I'd be happy to hear a confirming answer, as it's one less
dependency on SYSC PM Domains in early SMP code ;-)

Ah, this is because r8a7790 can boot from either CA15 or CA7, and only the
SCU for the boot CPU is powered up (r8a7791 has only one cluster/SCU, so it's
always the one with the boot CPU)?

Note that on r8a7779 we're also stuck with this dependency, as r8a7779 uses
SYSC instead of APMU for secondary core control.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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