From: Stephen Boyd <sboyd@codeaurora.org>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org,
Arnd Bergmann <arnd@arndb.de>,
Russell King <linux@arm.linux.org.uk>,
Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Marc Zyngier <marc.zyngier@arm.com>,
Will Deacon <will.deacon@arm.com>, Rob Herring <robh@kernel.org>,
devicetree@vger.kernel.org,
Michael Turquette <mturquette@baylibre.com>,
linux-clk@vger.kernel.org
Subject: Re: [PATCH 08/13] clk: add ARM syscon ICST device tree bindings
Date: Thu, 15 Oct 2015 12:23:25 -0700 [thread overview]
Message-ID: <20151015192325.GN4558@codeaurora.org> (raw)
In-Reply-To: <1444916813-31024-9-git-send-email-linus.walleij@linaro.org>
On 10/15, Linus Walleij wrote:
> diff --git a/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt b/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt
> new file mode 100644
> index 000000000000..19eb3aa765c7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt
> @@ -0,0 +1,40 @@
> +ARM System Controller ICST clocks
> +
> +The ICS525 and ICS307 oscillators are produced by Integrated Devices
> +Technology (IDT). ARM integrated these oscillators deeply into their
> +reference designs by adding special control registers that manage such
> +oscillators to their system controllers.
> +
> +The ARM system controller contains logic to serialized and initialize
serialize ?
> +an ICST clock request after a write to the 32 bit register at an offset
> +into the system controller. Further, to even be able to alter one of
Furthermore?
> +these frequencies, the system controller must first be unlocked by
> +writing a special token to another offset in the system controller.
Sounds like a great design!
> +
> +The ICST oscillator must be provided inside a system controller node.
> +
> +Required properties:
> +- lock-offset: the offset address into the system controller where the
> + unlocking register is located
> +- vco-offset: the offset address into the system controller where the
> + ICST control register is located (even 32 bit address)
Is there any reason why we don't use a reg property for this?
> +- compatible: must be one of "arm,syscon-icst525" or "arm,syscon-icst307"
> +- #clock-cells: must be <0>
> +- clocks: parent clock, since the ICST needs a parent clock to derive its
> + frequency from, this attribute is compulsory.
> +
> +Example:
> +
> +syscon: syscon@10000000 {
> + compatible = "syscon";
> + reg = <0x10000000 0x1000>;
> +
> + oscclk0: osc0@0c {
> + compatible = "arm,syscon-icst307";
> + #clock-cells = <0>;
> + lock-offset = <0x20>;
> + vco-offset = <0x0C>;
lowercase the C?
> + clocks = <&xtal24mhz>;
> + };
> + (...)
> +};
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2015-10-15 19:23 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1444916813-31024-1-git-send-email-linus.walleij@linaro.org>
[not found] ` <1444916813-31024-1-git-send-email-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-10-15 13:46 ` [PATCH 01/13] ARM: add some L220 DT settings Linus Walleij
[not found] ` <1444916813-31024-2-git-send-email-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-10-15 13:57 ` Russell King - ARM Linux
[not found] ` <20151015135730.GC32532-l+eeeJia6m9vn6HldHNs0ANdhmdF6hFW@public.gmane.org>
2015-10-22 12:57 ` Linus Walleij
2015-10-15 13:58 ` Rob Herring
2015-10-15 13:46 ` [PATCH 03/13] irqchips: fix ARM11MPCore GIC bindings Linus Walleij
[not found] ` <1444916813-31024-4-git-send-email-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-11-02 14:35 ` Rob Herring
2015-10-15 13:46 ` [PATCH 08/13] clk: add ARM syscon ICST device tree bindings Linus Walleij
2015-10-15 19:23 ` Stephen Boyd [this message]
[not found] ` <20151015192325.GN4558-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2015-10-23 9:48 ` Linus Walleij
2015-10-23 16:43 ` Stephen Boyd
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