From: Wolfram Sang <wsa@the-dreams.de>
To: Alexander Sverdlin <alexander.sverdlin@nokia.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>,
linux-i2c@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>, Sekhar Nori <nsekhar@ti.com>,
Kevin Hilman <khilman@deeprootsystems.com>,
devicetree@vger.kernel.org,
Hemanth Guruva Reddy <hemanth.guruva_reddy@nokia.com>,
Lukasz Gemborowski <lukasz.gemborowski@nokia.com>
Subject: Re: [PATCH v2] i2c: davinci: Optimize clock generation on Keystone SoC
Date: Tue, 20 Oct 2015 17:05:46 +0200 [thread overview]
Message-ID: <20151020150545.GF5379@katana> (raw)
In-Reply-To: <55F68D76.1060207@nokia.com>
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On Mon, Sep 14, 2015 at 11:03:50AM +0200, Alexander Sverdlin wrote:
> According to "KeyStone Architecture Inter-IC Control Bus User Guide", fixed
> additive part of frequency divisors (referred as "d" in the code and datasheet)
> always equals to 6, independent of module clock prescaler.
>
> module clock frequency
Applied to for-next, thanks!
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prev parent reply other threads:[~2015-10-20 15:05 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-14 9:03 [PATCH v2] i2c: davinci: Optimize clock generation on Keystone SoC Alexander Sverdlin
2015-10-20 15:05 ` Wolfram Sang [this message]
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