From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH 3/6] pinctrl: sunxi: Add H3 PIO controller support Date: Thu, 22 Oct 2015 10:30:43 +0200 Message-ID: <20151022083043.GP10947@lukather> References: <5627BDB6.6020501@gmail.com> <883408ea-bb2e-4f93-a2e6-40efad4ee42f@googlegroups.com> Reply-To: maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="QKpLca3blcvhMJ0W" Return-path: Content-Disposition: inline In-Reply-To: <883408ea-bb2e-4f93-a2e6-40efad4ee42f-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: josef.gajdusek-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org Cc: linux-sunxi , wens-jdAy2FN1RRM@public.gmane.org, mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org, linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org, emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org, vishnupatekar0510-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, jenskuske-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org List-Id: devicetree@vger.kernel.org --QKpLca3blcvhMJ0W Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Hi, On Thu, Oct 22, 2015 at 01:21:26AM -0700, josef.gajdusek-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org wrote: > Hi everyone, > > I might be missing something, but why is the PL* GPIO bank not > declared here? Because it's in the PRCM. This one was adding support for the main port controller. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --QKpLca3blcvhMJ0W--