From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH v6 1/8] dt-bindings: add documentation of rk3036 clock controller Date: Wed, 4 Nov 2015 21:22:56 -0600 Message-ID: <20151105032256.GA3261@rob-hp-laptop> References: <1446639503-11763-1-git-send-email-zhengxing@rock-chips.com> <1446639503-11763-2-git-send-email-zhengxing@rock-chips.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1446639503-11763-2-git-send-email-zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Xing Zheng Cc: heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org On Wed, Nov 04, 2015 at 08:18:16PM +0800, Xing Zheng wrote: > Add the devicetree binding for the cru on the rk3036 which quite similar > structured as previous clock controllers. > > Signed-off-by: Xing Zheng > Reviewed-by: Heiko Stuebner Acked-by: Rob Herring > --- > > Changes in v6: None > > .../bindings/clock/rockchip,rk3036-cru.txt | 56 ++++++++++++++++++++ > 1 file changed, 56 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt > > diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt > new file mode 100644 > index 0000000..ace0599 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt > @@ -0,0 +1,56 @@ > +* Rockchip RK3036 Clock and Reset Unit > + > +The RK3036 clock controller generates and supplies clock to various > +controllers within the SoC and also implements a reset controller for SoC > +peripherals. > + > +Required Properties: > + > +- compatible: should be "rockchip,rk3036-cru" > +- reg: physical base address of the controller and length of memory mapped > + region. > +- #clock-cells: should be 1. > +- #reset-cells: should be 1. > + > +Optional Properties: > + > +- rockchip,grf: phandle to the syscon managing the "general register files" > + If missing pll rates are not changeable, due to the missing pll lock status. > + > +Each clock is assigned an identifier and client nodes can use this identifier > +to specify the clock which they consume. All available clocks are defined as > +preprocessor macros in the dt-bindings/clock/rk3036-cru.h headers and can be > +used in device tree sources. Similar macros exist for the reset sources in > +these files. > + > +External clocks: > + > +There are several clocks that are generated outside the SoC. It is expected > +that they are defined using standard clock bindings with following > +clock-output-names: > + - "xin24m" - crystal input - required, > + - "ext_i2s" - external I2S clock - optional, > + - "ext_gmac" - external GMAC clock - optional > + > +Example: Clock controller node: > + > + cru: cru@20000000 { > + compatible = "rockchip,rk3036-cru"; > + reg = <0x20000000 0x1000>; > + rockchip,grf = <&grf>; > + > + #clock-cells = <1>; > + #reset-cells = <1>; > + }; > + > +Example: UART controller node that consumes the clock generated by the clock > + controller: > + > + uart0: serial@20060000 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x20060000 0x100>; > + interrupts = ; > + reg-shift = <2>; > + reg-io-width = <4>; > + clocks = <&cru SCLK_UART0>; > + }; > -- > 1.7.9.5 > > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html