From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH 05/19] clk: sunxi: add DRAM gates Date: Thu, 19 Nov 2015 16:43:47 +0100 Message-ID: <20151119154347.GR32142@lukather> References: <1446214865-3972-1-git-send-email-maxime.ripard@free-electrons.com> <1446214865-3972-6-git-send-email-maxime.ripard@free-electrons.com> Reply-To: maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="brdEIFGMNIjz5YJG" Return-path: Content-Disposition: inline In-Reply-To: List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Chen-Yu Tsai Cc: Mike Turquette , Stephen Boyd , David Airlie , Thierry Reding , devicetree , linux-arm-kernel , linux-kernel , linux-clk , dri-devel , linux-sunxi , Laurent Pinchart , Hans de Goede , Alexander Kaplan , Wynter Woods , Boris Brezillon , Thomas Petazzoni , Rob Clark , Daniel Vetter List-Id: devicetree@vger.kernel.org --brdEIFGMNIjz5YJG Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline On Fri, Nov 13, 2015 at 04:08:53PM +0800, Chen-Yu Tsai wrote: > On Mon, Nov 9, 2015 at 12:18 PM, Chen-Yu Tsai wrote: > > On Fri, Oct 30, 2015 at 10:20 PM, Maxime Ripard > > wrote: > >> The Allwinner SoCs have a gate controller to gate the access to the DRAM > >> clock to the some devices that need to access the DRAM directly (mostly > >> display / image related IPs). > >> > >> Use a simple gates driver to support it. > >> > >> Signed-off-by: Maxime Ripard > > > > Acked-by: Chen-Yu Tsai > > > >> --- > >> drivers/clk/sunxi/clk-simple-gates.c | 2 ++ > >> 1 file changed, 2 insertions(+) > >> > >> diff --git a/drivers/clk/sunxi/clk-simple-gates.c b/drivers/clk/sunxi/clk-simple-gates.c > >> index 0214c6548afd..5666c767fa14 100644 > >> --- a/drivers/clk/sunxi/clk-simple-gates.c > >> +++ b/drivers/clk/sunxi/clk-simple-gates.c > >> @@ -112,6 +112,8 @@ CLK_OF_DECLARE(sun5i_a13_apb0, "allwinner,sun5i-a13-apb0-gates-clk", > >> sunxi_simple_gates_init); > >> CLK_OF_DECLARE(sun5i_a13_apb1, "allwinner,sun5i-a13-apb1-gates-clk", > >> sunxi_simple_gates_init); > >> +CLK_OF_DECLARE(sun5i_a13_dram, "allwinner,sun5i-a13-dram-gates-clk", > >> + sunxi_simple_gates_init); > > Nit: Since the compatible added is sun5i, could you mention it in the > commit message, > to avoid confusion when we do this for the other families? It will be fixed in the v2. Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --brdEIFGMNIjz5YJG--