From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH 01/14] DEVICETREE: Add bindings for PIC32 interrupt controller Date: Sun, 22 Nov 2015 15:14:53 -0600 Message-ID: <20151122211453.GA13180@rob-hp-laptop> References: <1448065205-15762-1-git-send-email-joshua.henderson@microchip.com> <1448065205-15762-2-git-send-email-joshua.henderson@microchip.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1448065205-15762-2-git-send-email-joshua.henderson-UWL1GkI3JZL3oGB3hsPCZA@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Joshua Henderson Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org, Cristian Birsan , Thomas Gleixner , Jason Cooper , Marc Zyngier , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org On Fri, Nov 20, 2015 at 05:17:13PM -0700, Joshua Henderson wrote: > From: Cristian Birsan > > Document the devicetree bindings for the interrupt controller on Microchip > PIC32 class devices. This also adds a header defining associated interrupts > and related settings. > > Signed-off-by: Cristian Birsan > Signed-off-by: Joshua Henderson > --- > .../microchip,pic32mz-evic.txt | 65 ++++++ > .../interrupt-controller/microchip,pic32mz-evic.h | 238 ++++++++++++++++++++ > 2 files changed, 303 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/microchip,pic32mz-evic.txt > create mode 100644 include/dt-bindings/interrupt-controller/microchip,pic32mz-evic.h > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32mz-evic.txt b/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32mz-evic.txt > new file mode 100644 > index 0000000..12fb91f > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32mz-evic.txt > @@ -0,0 +1,65 @@ > +Microchip PIC32MZ Interrupt Controller > +====================================== > + > +The Microchip PIC32MZ SOC contains an Enhanced Vectored Interrupt Controller > +(EVIC) version 2. It handles internal and external interrupts and provides > +support for priority, sub-priority, irq type and polarity. > + > +Required properties > +------------------- > + > +- compatible: Should be "microchip,evic-v2" This should be more specific like "microchip,pic32mz-evic". You can keep this one in addition if you like for matching. Rob -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html