From: Gavin Shan <gwshan@linux.vnet.ibm.com>
To: Alexey Kardashevskiy <aik@au1.ibm.com>
Cc: Gavin Shan <gwshan@linux.vnet.ibm.com>,
linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, benh@kernel.crashing.org,
mpe@ellerman.id.au, bhelgaas@google.com, grant.likely@linaro.org,
robherring2@gmail.com, panto@antoniou-consulting.com,
frowand.list@gmail.com
Subject: Re: [PATCH v7 27/50] powerpc/powernv: Dynamically release PEs
Date: Tue, 24 Nov 2015 10:06:01 +1100 [thread overview]
Message-ID: <20151123230601.GC5375@gwshan> (raw)
In-Reply-To: <564BE109.8000809@au1.ibm.com>
On Wed, Nov 18, 2015 at 01:23:05PM +1100, Alexey Kardashevskiy wrote:
>On 11/05/2015 12:12 AM, Gavin Shan wrote:
>>This adds a reference count of PE, representing the number of PCI
>>devices associated with the PE. The reference count is increased
>>or decreased when PCI devices join or leave the PE. Once it becomes
>>zero, the PE together with its used resources (IO, MMIO, DMA, PELTM,
>>PELTV) are released to support PCI hot unplug.
>
>
>The commit log suggest the patch only adds a counter, initializes it, and
>replaces unconditional release of an object (in this case - PE) with the
>conditional one. But it is more that that...
>
Yes, it's more than that as stated in the commit log.
>>Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
>>---
>> arch/powerpc/platforms/powernv/pci-ioda.c | 245 ++++++++++++++++++++++++++----
>> arch/powerpc/platforms/powernv/pci.h | 1 +
>> 2 files changed, 218 insertions(+), 28 deletions(-)
>>
>>diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
>>index 0bb0056..dcffce5 100644
>>--- a/arch/powerpc/platforms/powernv/pci-ioda.c
>>+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
>>@@ -129,6 +129,215 @@ static inline bool pnv_pci_is_mem_pref_64(unsigned long flags)
>> (IORESOURCE_MEM_64 | IORESOURCE_PREFETCH));
>> }
>>
>>+static void pnv_pci_ioda1_release_dma_pe(struct pnv_ioda_pe *pe)
>>+{
>>+ struct pnv_phb *phb = pe->phb;
>>+ struct iommu_table *tbl;
>>+ int start, count, i;
>>+ int64_t rc;
>>+
>>+ /* Search for the used DMA32 segments */
>>+ start = -1;
>>+ count = 0;
>>+ for (i = 0; i < phb->ioda.dma32_count; i++) {
>>+ if (phb->ioda.dma32_segmap[i] != pe->pe_number)
>>+ continue;
>>+
>>+ count++;
>>+ if (start < 0)
>>+ start = i;
>>+ }
>>+
>>+ if (!count)
>>+ return;
>
>
>imho checking pe->table_group.tables[0] != NULL is shorter than the loop above.
>
Will use it in next revision.
>>+
>>+ /* Unlink IOMMU table from group */
>>+ tbl = pe->table_group.tables[0];
>>+ pnv_pci_unlink_table_and_group(tbl, &pe->table_group);
>>+ if (pe->table_group.group) {
>>+ iommu_group_put(pe->table_group.group);
>>+ WARN_ON(pe->table_group.group);
>>+ }
>>+
>>+ /* Release IOMMU table */
>>+ pnv_pci_ioda2_table_free_pages(tbl);
>
>
>This is IODA2 helper with multilevel support, does IODA1 support multilevel
>TCE tables? If not, it should WARN_ON on levels!=1.
>
>Another thing is you should first unprogram TVEs (via
>opal_pci_map_pe_dma_window), then invalidate the cache (if required, not sure
>if this is needed on IODA1), only then free the actual table.
>
>
>>+ iommu_free_table(tbl, of_node_full_name(pci_bus_to_OF_node(pe->pbus)));
>>+
>>+ /* Disable TVE */
>>+ for (i = start; i < start + count; i++) {
>>+ rc = opal_pci_map_pe_dma_window(phb->opal_id, pe->pe_number,
>>+ i, 0, 0ul, 0ul, 0ul);
>>+ if (rc)
>>+ pe_warn(pe, "Error %ld unmapping DMA32 seg#%d\n",
>>+ rc, i);
>>+
>>+ phb->ioda.dma32_segmap[i] = IODA_INVALID_PE;
>>+ }
>
>
>You could implement pnv_pci_ioda1_unset_window/pnv_ioda1_table_free as
>callbacks, change pnv_pci_ioda2_release_dma_pe() to use them (and rename it
>to reflect that it supports IODA1 and IODA2).
>
>
>>+}
>>+
>>+static unsigned int pnv_pci_ioda_pe_dma_weight(struct pnv_ioda_pe *pe);
>>+static long pnv_pci_ioda2_unset_window(struct iommu_table_group *table_group,
>>+ int num);
>>+static void pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable);
>>+
>>+static void pnv_pci_ioda2_release_dma_pe(struct pnv_ioda_pe *pe)
>
>
>You moved this function and changed it, please do one thing at once (which is
>"change", not "move").
>
>>+{
>>+ struct iommu_table *tbl;
>>+ unsigned int weight = pnv_pci_ioda_pe_dma_weight(pe);
>>+ int64_t rc;
>>+
>>+ if (!weight)
>>+ return;
>
>
>Checking for pe->table_group.group is better because if we ever change the
>logic of what gets included to an IOMMU group, we will have to do the change
>where we add devices to a group but we won't have to touch releasing code.
>
>
>>+
>>+ tbl = pe->table_group.tables[0];
>>+ rc = pnv_pci_ioda2_unset_window(&pe->table_group, 0);
>>+ if (rc)
>>+ pe_warn(pe, "OPAL error %ld release DMA window\n", rc);
>>+
>>+ pnv_pci_ioda2_set_bypass(pe, false);
>>+ if (pe->table_group.group) {
>>+ iommu_group_put(pe->table_group.group);
>>+ WARN_ON(pe->table_group.group);
>>+ }
>>+
>>+ pnv_pci_ioda2_table_free_pages(tbl);
>>+ iommu_free_table(tbl, "pnv");
>>+}
>>+
>>+static void pnv_ioda_release_dma_pe(struct pnv_ioda_pe *pe)
>
>Merge this into pnv_ioda_release_pe() - it is small and called just once.
>
>
>>+{
>>+ struct pnv_phb *phb = pe->phb;
>>+
>>+ switch (phb->type) {
>>+ case PNV_PHB_IODA1:
>>+ pnv_pci_ioda1_release_dma_pe(pe);
>>+ break;
>>+ case PNV_PHB_IODA2:
>>+ pnv_pci_ioda2_release_dma_pe(pe);
>>+ break;
>>+ default:
>>+ WARN_ON(1);
>>+ }
>>+}
>>+
>>+static void pnv_ioda_release_window(struct pnv_ioda_pe *pe, int win)
>>+{
>>+ struct pnv_phb *phb = pe->phb;
>>+ int index, *segmap = NULL;
>>+ int64_t rc;
>>+
>>+ switch (win) {
>>+ case OPAL_IO_WINDOW_TYPE:
>>+ segmap = phb->ioda.io_segmap;
>>+ break;
>>+ case OPAL_M32_WINDOW_TYPE:
>>+ segmap = phb->ioda.m32_segmap;
>>+ break;
>>+ case OPAL_M64_WINDOW_TYPE:
>>+ if (phb->type != PNV_PHB_IODA1)
>>+ return;
>>+ segmap = phb->ioda.m64_segmap;
>>+ break;
>>+ default:
>>+ return;
>
>Unnecessary return.
>
>
>>+ }
>>+
>>+ for (index = 0; index < phb->ioda.total_pe_num; index++) {
>>+ if (segmap[index] != pe->pe_number)
>>+ continue;
>>+
>>+ if (win == OPAL_M64_WINDOW_TYPE)
>>+ rc = opal_pci_map_pe_mmio_window(phb->opal_id,
>>+ phb->ioda.reserved_pe_idx, win,
>>+ index / PNV_IODA1_M64_SEGS,
>>+ index % PNV_IODA1_M64_SEGS);
>>+ else
>>+ rc = opal_pci_map_pe_mmio_window(phb->opal_id,
>>+ phb->ioda.reserved_pe_idx, win,
>>+ 0, index);
>>+
>>+ if (rc != OPAL_SUCCESS)
>>+ pe_warn(pe, "Error %ld unmapping (%d) segment#%d\n",
>>+ rc, win, index);
>>+
>>+ segmap[index] = IODA_INVALID_PE;
>>+ }
>>+}
>>+
>>+static void pnv_ioda_release_pe_seg(struct pnv_ioda_pe *pe)
>>+{
>>+ struct pnv_phb *phb = pe->phb;
>>+ int win;
>>+
>>+ for (win = OPAL_M32_WINDOW_TYPE; win <= OPAL_IO_WINDOW_TYPE; win++) {
>>+ if (phb->type == PNV_PHB_IODA2 && win == OPAL_IO_WINDOW_TYPE)
>>+ continue;
>
>Move this check to pnv_ioda_release_window() or move case(win ==
>OPAL_M64_WINDOW_TYPE):if(phb->type != PNV_PHB_IODA1) from that function here.
>
>
>>+
>>+ pnv_ioda_release_window(pe, win);
>>+ }
>>+}
>
>This is shorter and cleaner:
>
>
>static void pnv_ioda_release_window(struct pnv_ioda_pe *pe, int win, int
>*segmap
>{
> struct pnv_phb *phb = pe->phb;
> int index;
> int64_t rc;
>
> for (index = 0; index < phb->ioda.total_pe_num; index++) {
> if (segmap[index] != pe->pe_number)
> continue;
>
> if (win == OPAL_M64_WINDOW_TYPE)
> rc = opal_pci_map_pe_mmio_window(phb->opal_id,
> phb->ioda.reserved_pe_idx, win,
> index / PNV_IODA1_M64_SEGS,
> index % PNV_IODA1_M64_SEGS);
> else
> rc = opal_pci_map_pe_mmio_window(phb->opal_id,
> phb->ioda.reserved_pe_idx, win,
> 0, index);
>
> if (rc != OPAL_SUCCESS)
> pe_warn(pe, "Error %ld unmapping (%d) segment#%d\n",
> rc, win, index);
>
> segmap[index] = IODA_INVALID_PE;
> }
>}
>
>static void pnv_ioda_release_pe_seg(struct pnv_ioda_pe *pe)
>{
> pnv_ioda_release_window(pe, OPAL_M32_WINDOW_TYPE,
>phb->ioda.m32_segmap);
> if (phb->type != PNV_PHB_IODA2)
> pnv_ioda_release_window(pe, OPAL_IO_WINDOW_TYPE,
> phb->ioda.io_segmap);
> else
> pnv_ioda_release_window(pe, OPAL_M64_WINDOW_TYPE,
> phb->ioda.m64_segmap);
>}
>
>
>I'd actually merge pnv_ioda_release_pe_seg() into pnv_ioda_release_pe() as
>well as it is also small and called once.
>
>
>>+
>>+static int pnv_ioda_deconfigure_pe(struct pnv_phb *phb,
>>+ struct pnv_ioda_pe *pe);
>>+static void pnv_ioda_free_pe(struct pnv_ioda_pe *pe);
>>+static void pnv_ioda_release_pe(struct pnv_ioda_pe *pe)
>>+{
>>+ struct pnv_ioda_pe *tmp, *slave;
>>+
>>+ /* Release slave PEs in compound PE */
>>+ if (pe->flags & PNV_IODA_PE_MASTER) {
>>+ list_for_each_entry_safe(slave, tmp, &pe->slaves, list)
>>+ pnv_ioda_release_pe(slave);
>>+ }
>>+
>>+ /* Remove the PE from the list */
>>+ list_del(&pe->list);
>>+
>>+ /* Release resources */
>>+ pnv_ioda_release_dma_pe(pe);
>>+ pnv_ioda_release_pe_seg(pe);
>>+ pnv_ioda_deconfigure_pe(pe->phb, pe);
>>+
>>+ pnv_ioda_free_pe(pe);
>>+}
>>+
>>+static inline struct pnv_ioda_pe *pnv_ioda_pe_get(struct pnv_ioda_pe *pe)
>>+{
>>+ if (!pe)
>>+ return NULL;
>>+
>>+ pe->device_count++;
>>+ return pe;
>>+}
>>+
>>+static inline void pnv_ioda_pe_put(struct pnv_ioda_pe *pe)
>
>
>Merge this into pnv_pci_release_device() as it is small and called only once.
>
I don't think so. The functions pnv_ioda_pe_{get,put}() are paired. I think it's
good enough to have separate function for the logic included in pnv_ioda_pe_put().
>>+{
>>+ if (!pe)
>>+ return;
>>+
>>+ pe->device_count--;
>>+ WARN_ON(pe->device_count < 0);
>>+ if (pe->device_count == 0)
>>+ pnv_ioda_release_pe(pe);
>>+}
>>+
>>+static void pnv_pci_release_device(struct pci_dev *pdev)
>>+{
>>+ struct pci_controller *hose = pci_bus_to_host(pdev->bus);
>>+ struct pnv_phb *phb = hose->private_data;
>>+ struct pci_dn *pdn = pci_get_pdn(pdev);
>>+ struct pnv_ioda_pe *pe;
>>+
>>+ if (pdev->is_virtfn)
>>+ return;
>>+
>>+ if (!pdn || pdn->pe_number == IODA_INVALID_PE)
>>+ return;
>>+
>>+ pe = &phb->ioda.pe_array[pdn->pe_number];
>>+ pnv_ioda_pe_put(pe);
>>+}
>>+
>> static struct pnv_ioda_pe *pnv_ioda_init_pe(struct pnv_phb *phb, int pe_no)
>> {
>> phb->ioda.pe_array[pe_no].phb = phb;
>>@@ -724,7 +933,6 @@ static int pnv_ioda_set_peltv(struct pnv_phb *phb,
>> return 0;
>> }
>>
>>-#ifdef CONFIG_PCI_IOV
>> static int pnv_ioda_deconfigure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe)
>> {
>> struct pci_dev *parent;
>>@@ -759,9 +967,11 @@ static int pnv_ioda_deconfigure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe)
>> }
>> rid_end = pe->rid + (count << 8);
>> } else {
>>+#ifdef CONFIG_PCI_IOV
>> if (pe->flags & PNV_IODA_PE_VF)
>> parent = pe->parent_dev;
>> else
>>+#endif
>> parent = pe->pdev->bus->self;
>> bcomp = OpalPciBusAll;
>> dcomp = OPAL_COMPARE_RID_DEVICE_NUMBER;
>>@@ -799,11 +1009,12 @@ static int pnv_ioda_deconfigure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe)
>>
>> pe->pbus = NULL;
>> pe->pdev = NULL;
>>+#ifdef CONFIG_PCI_IOV
>> pe->parent_dev = NULL;
>>+#endif
>
>
>These #ifdef movements seem very much unrelated.
>
It's related: pnv_ioda_deconfigure_pe() was used for VF PE only. Now it's used by all
types of PEs. pe->parent_dev is declared as below:
#ifdef CONFIG_PCI_IOV
struct pci_dev *parent_dev;
#endif
>
>>
>> return 0;
>> }
>>-#endif /* CONFIG_PCI_IOV */
>>
>> static int pnv_ioda_configure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe)
>> {
>>@@ -985,6 +1196,7 @@ static void pnv_ioda_setup_same_PE(struct pci_bus *bus, struct pnv_ioda_pe *pe)
>> continue;
>>
>> pdn->pe_number = pe->pe_number;
>>+ pnv_ioda_pe_get(pe);
>> if ((pe->flags & PNV_IODA_PE_BUS_ALL) && dev->subordinate)
>> pnv_ioda_setup_same_PE(dev->subordinate, pe);
>> }
>>@@ -1047,9 +1259,8 @@ static struct pnv_ioda_pe *pnv_ioda_setup_bus_PE(struct pci_bus *bus, bool all)
>> bus->busn_res.start, pe->pe_number);
>>
>> if (pnv_ioda_configure_pe(phb, pe)) {
>>- /* XXX What do we do here ? */
>>- pnv_ioda_free_pe(pe);
>> pe->pbus = NULL;
>>+ pnv_ioda_release_pe(pe);
>
>
>This is unrelated unexplained change.
>
Will drop it in next revision.
>> return NULL;
>> }
>>
>>@@ -1199,29 +1410,6 @@ m64_failed:
>> return -EBUSY;
>> }
>>
>>-static long pnv_pci_ioda2_unset_window(struct iommu_table_group *table_group,
>>- int num);
>>-static void pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable);
>>-
>>-static void pnv_pci_ioda2_release_dma_pe(struct pci_dev *dev, struct pnv_ioda_pe *pe)
>>-{
>>- struct iommu_table *tbl;
>>- int64_t rc;
>>-
>>- tbl = pe->table_group.tables[0];
>>- rc = pnv_pci_ioda2_unset_window(&pe->table_group, 0);
>>- if (rc)
>>- pe_warn(pe, "OPAL error %ld release DMA window\n", rc);
>>-
>>- pnv_pci_ioda2_set_bypass(pe, false);
>>- if (pe->table_group.group) {
>>- iommu_group_put(pe->table_group.group);
>>- BUG_ON(pe->table_group.group);
>>- }
>>- pnv_pci_ioda2_table_free_pages(tbl);
>>- iommu_free_table(tbl, of_node_full_name(dev->dev.of_node));
>>-}
>>-
>> static void pnv_ioda_release_vf_PE(struct pci_dev *pdev)
>> {
>> struct pci_bus *bus;
>>@@ -1242,7 +1430,7 @@ static void pnv_ioda_release_vf_PE(struct pci_dev *pdev)
>> if (pe->parent_dev != pdev)
>> continue;
>>
>>- pnv_pci_ioda2_release_dma_pe(pdev, pe);
>>+ pnv_pci_ioda2_release_dma_pe(pe);
>
>
>This is unrelated change.
>
>>
>> /* Remove from list */
>> mutex_lock(&phb->ioda.pe_list_mutex);
>>@@ -3124,6 +3312,7 @@ static const struct pci_controller_ops pnv_pci_ioda_controller_ops = {
>> .teardown_msi_irqs = pnv_teardown_msi_irqs,
>> #endif
>> .enable_device_hook = pnv_pci_enable_device_hook,
>>+ .release_device = pnv_pci_release_device,
>> .window_alignment = pnv_pci_window_alignment,
>> .setup_bridge = pnv_pci_setup_bridge,
>> .reset_secondary_bus = pnv_pci_reset_secondary_bus,
>>diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h
>>index ef5271a..3bb10de 100644
>>--- a/arch/powerpc/platforms/powernv/pci.h
>>+++ b/arch/powerpc/platforms/powernv/pci.h
>>@@ -30,6 +30,7 @@ struct pnv_phb;
>> struct pnv_ioda_pe {
>> unsigned long flags;
>> struct pnv_phb *phb;
>>+ int device_count;
>
>Not atomic_t, no kref, no additional mutex, just "int"? Sure about it? If so,
>put a note to the commit log about what provides a guarantee that there is no
>race.
>
>
It was a kref. Something you suggested on v5 as below:
| You do not need kref here. You call kref_put() in a single location and can do
| stuff directly, without kref. Just have an "unsigned int" counter and that's
| it (it does not even have to be atomic if you do not have races but I am not
| sure you do not).
|
>>
>> /* A PE can be associated with a single device or an
>> * entire bus (& children). In the former case, pdev
>>
Thanks,
Gavin
next prev parent reply other threads:[~2015-11-23 23:06 UTC|newest]
Thread overview: 157+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-04 13:12 [PATCH v7 00/50] powerpc/powernv: PCI hotplug support Gavin Shan
2015-11-04 13:12 ` [PATCH v7 01/50] PCI: Add pcibios_setup_bridge() Gavin Shan
2015-11-04 13:12 ` [PATCH v7 02/50] powerpc/pci: Override pcibios_setup_bridge() Gavin Shan
2015-11-05 22:27 ` Daniel Axtens
2015-11-05 23:44 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 04/50] powerpc/powernv: Cleanup on pnv_pci_ioda_controller_ops Gavin Shan
2015-11-05 22:28 ` Daniel Axtens
2015-11-06 1:09 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 05/50] powerpc/powernv: Drop pnv_ioda_setup_dev_PE() Gavin Shan
2015-11-04 13:12 ` [PATCH v7 07/50] powerpc/powernv: Reorder fields in struct pnv_phb Gavin Shan
2015-11-04 13:12 ` [PATCH v7 08/50] powerpc/powernv: Rename PE# " Gavin Shan
2015-11-16 8:01 ` Alexey Kardashevskiy
2015-11-17 1:22 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 09/50] powerpc/powernv: Fix initial IO and M32 segmap Gavin Shan
2015-11-04 13:12 ` [PATCH v7 12/50] powerpc/powernv: Track M64 segment consumption Gavin Shan
2015-11-12 4:18 ` Daniel Axtens
2015-11-16 8:01 ` Alexey Kardashevskiy
2015-11-17 1:04 ` Gavin Shan
2015-11-19 0:10 ` Alexey Kardashevskiy
2015-11-23 22:42 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 13/50] powerpc/powernv: Rename M64 related functions Gavin Shan
2015-11-04 13:12 ` [PATCH v7 14/50] powerpc/powernv: M64 support on P7IOC Gavin Shan
2015-11-16 8:01 ` Alexey Kardashevskiy
2015-11-17 1:37 ` Gavin Shan
2015-11-19 0:18 ` Alexey Kardashevskiy
2015-11-22 22:46 ` Gavin Shan
2015-11-16 8:02 ` Alexey Kardashevskiy
2015-11-17 1:38 ` Gavin Shan
2015-11-17 2:11 ` Alexey Kardashevskiy
2015-11-17 2:44 ` Gavin Shan
2015-11-16 8:02 ` Alexey Kardashevskiy
2015-11-17 1:42 ` Gavin Shan
2015-11-17 2:37 ` Alexey Kardashevskiy
2015-11-17 3:04 ` Gavin Shan
2015-11-17 3:40 ` Benjamin Herrenschmidt
2015-11-17 4:43 ` Alexey Kardashevskiy
2015-11-17 8:44 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 15/50] powerpc/powernv: Rename pnv_pci_ioda_setup_dma_pe() Gavin Shan
2015-11-04 13:12 ` [PATCH v7 17/50] powerpc/powernv: Avoid calculating DMA32 segments on PHB3 Gavin Shan
2015-11-17 1:07 ` Alexey Kardashevskiy
2015-11-17 8:48 ` Gavin Shan
2015-11-17 23:59 ` Alexey Kardashevskiy
2015-11-04 13:12 ` [PATCH v7 18/50] powerpc/powernv: Remove DMA32 PE list Gavin Shan
2015-11-17 1:54 ` Alexey Kardashevskiy
2015-11-17 2:01 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 20/50] powerpc/powernv: Improve DMA32 segment calculation Gavin Shan
2015-11-20 3:14 ` Daniel Axtens
2015-11-04 13:12 ` [PATCH v7 21/50] powerpc/powernv: Increase PE# capacity Gavin Shan
2015-11-17 0:29 ` Daniel Axtens
2015-11-17 1:56 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 23/50] powerpc/powernv: Use PE instead of number during setup and release Gavin Shan
2015-11-17 5:08 ` Alexey Kardashevskiy
2015-11-17 9:03 ` Gavin Shan
2015-11-18 0:13 ` Alexey Kardashevskiy
2015-11-22 22:52 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 25/50] powerpc/powernv: Reserve PE for root bus Gavin Shan
2015-11-17 6:04 ` Alexey Kardashevskiy
2015-11-17 9:06 ` Gavin Shan
2015-11-19 0:21 ` Alexey Kardashevskiy
2015-11-04 13:12 ` [PATCH v7 26/50] powerpc/powernv: Create PEs at PCI hot plugging time Gavin Shan
2015-11-17 7:57 ` Alexey Kardashevskiy
2015-11-17 9:12 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 27/50] powerpc/powernv: Dynamically release PEs Gavin Shan
2015-11-18 2:23 ` Alexey Kardashevskiy
2015-11-23 23:06 ` Gavin Shan [this message]
2015-11-24 0:22 ` Alexey Kardashevskiy
2015-11-04 13:12 ` [PATCH v7 28/50] powerpc/pci: Rename pcibios_{add,remove}_pci_devices() Gavin Shan
2015-11-18 2:43 ` Alexey Kardashevskiy
2015-11-23 23:08 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 30/50] powerpc/pci: Move pci_find_bus_by_node() around Gavin Shan
2015-11-04 13:12 ` [PATCH v7 31/50] powerpc/pci: Export pci_add_device_node_info() Gavin Shan
2015-11-04 13:12 ` [PATCH v7 32/50] powerpc/pci: Introduce pci_remove_device_node_info() Gavin Shan
[not found] ` <1446642770-4681-1-git-send-email-gwshan-23VcF4HTsmIX0ybBhKVfKdBPR1lH4CV8@public.gmane.org>
2015-11-04 13:12 ` [PATCH v7 03/50] powerpc/pci: Cleanup on struct pci_controller_ops Gavin Shan
2015-11-05 22:32 ` Daniel Axtens
2015-11-05 23:45 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 06/50] powerpc/powernv: Drop phb->bdfn_to_pe() Gavin Shan
2015-11-04 13:12 ` [PATCH v7 10/50] powerpc/powernv: Simplify pnv_ioda_setup_pe_seg() Gavin Shan
2015-11-05 22:56 ` Daniel Axtens
2015-11-05 23:52 ` Gavin Shan
2015-11-16 8:01 ` Alexey Kardashevskiy
2015-11-17 0:54 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 11/50] powerpc/powernv: IO and M32 mapping based on PCI device resources Gavin Shan
2015-11-12 3:30 ` Daniel Axtens
2015-11-12 4:55 ` Gavin Shan
2015-11-16 8:01 ` Alexey Kardashevskiy
2015-11-17 1:33 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 16/50] powerpc/powernv: Define PNV_IODA1_DMA32_SEGSIZE Gavin Shan
2015-11-04 13:12 ` [PATCH v7 19/50] powerpc/powernv: Track DMA32 segment consumption Gavin Shan
2015-11-17 0:28 ` Daniel Axtens
2015-11-17 1:55 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 22/50] powerpc/powernv: Introduce pnv_ioda_init_pe() Gavin Shan
2015-11-17 0:30 ` Daniel Axtens
2015-11-17 1:58 ` Gavin Shan
2015-11-17 2:37 ` Alexey Kardashevskiy
2015-11-17 2:53 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 24/50] powerpc/powernv: Allocate PE# in reverse order Gavin Shan
2015-11-04 13:12 ` [PATCH v7 29/50] powerpc/pci: Rename pcibios_find_pci_bus() Gavin Shan
2015-11-18 3:59 ` Alexey Kardashevskiy
2015-11-23 23:11 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 33/50] powerpc/pci: Export pci_traverse_device_nodes() Gavin Shan
2015-11-18 3:14 ` Alexey Kardashevskiy
2015-11-23 23:23 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 36/50] powerpc/pci: Update bridge windows on PCI plug Gavin Shan
2015-11-04 13:12 ` [PATCH v7 47/50] drivers/of: Specify parent node in of_fdt_unflatten_tree() Gavin Shan
2015-11-04 13:12 ` [PATCH v7 49/50] drivers/of: Export OF changeset functions Gavin Shan
2015-11-04 16:12 ` Rob Herring
2015-11-04 23:23 ` Gavin Shan
2016-01-13 13:54 ` [v7,49/50] " Wolfram Sang
2016-01-13 21:18 ` Michael Ellerman
[not found] ` <1452719886.8203.1.camel-Gsx/Oe8HsFggBc27wqDAHg@public.gmane.org>
2016-01-13 21:20 ` Wolfram Sang
2016-01-13 23:53 ` Rob Herring
[not found] ` <CAL_JsqLaCMYMGLu_2aoXopgMHmT09xU1CSO4NZokMVUOZTPSJg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-01-14 7:28 ` Wolfram Sang
2015-11-04 13:12 ` [PATCH v7 34/50] powerpc/pci: Delay populating pdn Gavin Shan
2015-11-18 4:24 ` Alexey Kardashevskiy
2015-11-23 23:42 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 35/50] powerpc/pci: Don't scan empty slot Gavin Shan
2015-11-04 13:12 ` [PATCH v7 37/50] powerpc/powernv: Simplify pnv_eeh_reset() Gavin Shan
2015-11-12 5:11 ` Daniel Axtens
2015-11-12 6:11 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 38/50] powerpc/powernv: Exclude root bus in pnv_pci_reset_secondary_bus() Gavin Shan
2015-11-12 22:59 ` Daniel Axtens
2015-11-12 23:25 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 39/50] powerpc/powernv: Fundamental reset " Gavin Shan
2015-11-12 6:15 ` Gavin Shan
2015-11-13 0:08 ` Daniel Axtens
2015-11-13 0:20 ` Gavin Shan
[not found] ` <87fv0azrpe.fsf-lvn/ZZ/ogF85kJ7NmlRacFaTQe2KTcn/@public.gmane.org>
2015-11-13 0:23 ` Benjamin Herrenschmidt
2015-11-13 0:23 ` Daniel Axtens
2015-11-04 13:12 ` [PATCH v7 40/50] powerpc/powernv: Support PCI slot ID Gavin Shan
2015-11-04 13:12 ` [PATCH v7 41/50] powerpc/powernv: Use firmware PCI slot reset infrastructure Gavin Shan
2015-11-04 13:12 ` [PATCH v7 42/50] powerpc/powernv: Functions to get/set PCI slot status Gavin Shan
2015-11-04 13:12 ` [PATCH v7 43/50] powerpc/powernv: Select OF_DYNAMIC Gavin Shan
2015-11-04 13:12 ` [PATCH v7 44/50] drivers/of: Split unflatten_dt_node() Gavin Shan
2015-11-04 18:43 ` Rob Herring
2015-11-04 23:05 ` Gavin Shan
2015-11-04 13:12 ` [PATCH v7 45/50] drivers/of: Avoid recursively calling unflatten_dt_node() Gavin Shan
2015-11-04 16:07 ` Rob Herring
2015-11-04 23:23 ` Gavin Shan
2015-11-04 23:26 ` Gavin Shan
[not found] ` <CAL_JsqJGpV-+JYyA1g0dw_nEduhmrMEouTH03kHtuCkGSOP57Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-05-13 7:16 ` Geert Uytterhoeven
2016-05-13 11:31 ` [PATCH] drivers/of: Fix build warning in populate_node() Gavin Shan
2016-05-16 14:11 ` Rob Herring
[not found] ` <1446642770-4681-46-git-send-email-gwshan-23VcF4HTsmIX0ybBhKVfKdBPR1lH4CV8@public.gmane.org>
2015-12-06 20:28 ` [PATCH v7 45/50] drivers/of: Avoid recursively calling unflatten_dt_node() Rob Herring
[not found] ` <CAL_Jsq+BnPEKkRgQX4+e0MA9dKLVLhy8rVF25Fr9yXL2jp+WLA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-12-06 21:49 ` Guenter Roeck
2015-12-06 23:54 ` Benjamin Herrenschmidt
2015-12-07 2:21 ` Guenter Roeck
2015-12-07 2:33 ` Rob Herring
2015-12-07 3:40 ` Guenter Roeck
2015-11-04 13:12 ` [PATCH v7 46/50] drivers/of: Rename unflatten_dt_node() Gavin Shan
2015-11-04 13:12 ` [PATCH v7 48/50] drivers/of: Return allocated memory from of_fdt_unflatten_tree() Gavin Shan
2015-11-04 13:12 ` [PATCH v7 50/50] PCI/hotplug: PowerPC PowerNV PCI hotplug driver Gavin Shan
[not found] ` <1446642770-4681-51-git-send-email-gwshan-23VcF4HTsmIX0ybBhKVfKdBPR1lH4CV8@public.gmane.org>
2015-11-18 7:33 ` Alexey Kardashevskiy
2015-11-23 23:16 ` Gavin Shan
2015-11-09 3:09 ` [PATCH v7 00/50] powerpc/powernv: PCI hotplug support Gavin Shan
2015-11-09 4:24 ` Pramod Sudheendra
2015-11-09 4:29 ` Gavin Shan
2015-11-09 6:43 ` Benjamin Herrenschmidt
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20151123230601.GC5375@gwshan \
--to=gwshan@linux.vnet.ibm.com \
--cc=aik@au1.ibm.com \
--cc=benh@kernel.crashing.org \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=frowand.list@gmail.com \
--cc=grant.likely@linaro.org \
--cc=linux-pci@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=mpe@ellerman.id.au \
--cc=panto@antoniou-consulting.com \
--cc=robherring2@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).