* [PATCH v2 1/5] mtd: nand: omap2: Support parsing dma channel information from DT
2015-10-15 17:37 [PATCH v2 0/5] mtd: nand: Fix support for NAND DMA prefetch Franklin S Cooper Jr
@ 2015-10-15 17:37 ` Franklin S Cooper Jr
2015-10-15 17:37 ` [PATCH v2 2/5] mtd: nand: omap2: Start dma request before enabling prefetch Franklin S Cooper Jr
` (5 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Franklin S Cooper Jr @ 2015-10-15 17:37 UTC (permalink / raw)
To: linux-kernel, rogerq, devicetree, linux-omap, linux-mtd, nsekhar,
computersforpeace, dwmw2, tony
Cc: Franklin S Cooper Jr
Switch from dma_request_channel to allow passing dma channel
information from DT rather than hardcoding a value.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
---
V2 Changes:
None
drivers/mtd/nand/omap2.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index d0f2620..957c32f 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1866,7 +1866,9 @@ static int omap_nand_probe(struct platform_device *pdev)
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
sig = OMAP24XX_DMA_GPMC;
- info->dma = dma_request_channel(mask, omap_dma_filter_fn, &sig);
+ info->dma = dma_request_slave_channel_compat(mask,
+ omap_dma_filter_fn, &sig, pdev->dev.parent, "rxtx");
+
if (!info->dma) {
dev_err(&pdev->dev, "DMA engine request failed\n");
err = -ENXIO;
--
2.6.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v2 2/5] mtd: nand: omap2: Start dma request before enabling prefetch
2015-10-15 17:37 [PATCH v2 0/5] mtd: nand: Fix support for NAND DMA prefetch Franklin S Cooper Jr
2015-10-15 17:37 ` [PATCH v2 1/5] mtd: nand: omap2: Support parsing dma channel information from DT Franklin S Cooper Jr
@ 2015-10-15 17:37 ` Franklin S Cooper Jr
2015-10-15 17:37 ` [PATCH v2 3/5] mtd: nand: omap2: Fix high memory dma prefetch transfer Franklin S Cooper Jr
` (4 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Franklin S Cooper Jr @ 2015-10-15 17:37 UTC (permalink / raw)
To: linux-kernel, rogerq, devicetree, linux-omap, linux-mtd, nsekhar,
computersforpeace, dwmw2, tony
Cc: Franklin S Cooper Jr
The prefetch engine sends a dma request once a FIFO threshold has
been met. No other requests are received until the previous request
is handled.
Starting an edma transfer (dma_async_issue_pending) results in any
previous event for the dma channel to be cleared. Therefore, starting
the prefetch engine before initiating the dma transfer may result in
the prefetch triggering a dma request but instead of it being handled
it can end up being cleared. This will result in a hang since the code
will continue to wait for the dma request to complete.
By initiating the dma request before enabling the prefetch engine this
race condition is avoided and no dma request are missed/cleared.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
---
V2 Changes:
Moved comment
drivers/mtd/nand/omap2.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 957c32f..1f58420 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -509,6 +509,11 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
tx->callback_param = &info->comp;
dmaengine_submit(tx);
+ init_completion(&info->comp);
+
+ /* setup and start DMA using dma_addr */
+ dma_async_issue_pending(info->dma);
+
/* configure and start prefetch transfer */
ret = omap_prefetch_enable(info->gpmc_cs,
PREFETCH_FIFOTHRESHOLD_MAX, 0x1, len, is_write, info);
@@ -516,10 +521,6 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
/* PFPW engine is busy, use cpu copy method */
goto out_copy_unmap;
- init_completion(&info->comp);
- dma_async_issue_pending(info->dma);
-
- /* setup and start DMA using dma_addr */
wait_for_completion(&info->comp);
tim = 0;
limit = (loops_per_jiffy * msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));
--
2.6.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v2 3/5] mtd: nand: omap2: Fix high memory dma prefetch transfer
2015-10-15 17:37 [PATCH v2 0/5] mtd: nand: Fix support for NAND DMA prefetch Franklin S Cooper Jr
2015-10-15 17:37 ` [PATCH v2 1/5] mtd: nand: omap2: Support parsing dma channel information from DT Franklin S Cooper Jr
2015-10-15 17:37 ` [PATCH v2 2/5] mtd: nand: omap2: Start dma request before enabling prefetch Franklin S Cooper Jr
@ 2015-10-15 17:37 ` Franklin S Cooper Jr
2015-10-15 17:37 ` [PATCH v2 4/5] ARM: dts: am437x/am33xx/omap/dm816x: Add gpmc dma channel Franklin S Cooper Jr
` (3 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Franklin S Cooper Jr @ 2015-10-15 17:37 UTC (permalink / raw)
To: linux-kernel, rogerq, devicetree, linux-omap, linux-mtd, nsekhar,
computersforpeace, dwmw2, tony
Cc: Franklin S Cooper Jr
Based on DMA documentation and testing using high memory buffer when
doing dma transfers can lead to various issues including kernel
panics.
To workaround this simply use cpu copy. The amount of high memory
buffers used are very uncommon so no noticeable performance hit should
be seen.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
---
V2 Changes:
None
drivers/mtd/nand/omap2.c | 14 +++-----------
1 file changed, 3 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 1f58420..0d2cbb0 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -479,17 +479,8 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
int ret;
u32 val;
- if (addr >= high_memory) {
- struct page *p1;
-
- if (((size_t)addr & PAGE_MASK) !=
- ((size_t)(addr + len - 1) & PAGE_MASK))
- goto out_copy;
- p1 = vmalloc_to_page(addr);
- if (!p1)
- goto out_copy;
- addr = page_address(p1) + ((size_t)addr & ~PAGE_MASK);
- }
+ if (addr >= high_memory)
+ goto out_copy;
sg_init_one(&sg, addr, len);
n = dma_map_sg(info->dma->device->dev, &sg, 1, dir);
@@ -546,6 +537,7 @@ out_copy:
else
is_write == 0 ? omap_read_buf8(mtd, (u_char *) addr, len)
: omap_write_buf8(mtd, (u_char *) addr, len);
+
return 0;
}
--
2.6.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v2 4/5] ARM: dts: am437x/am33xx/omap/dm816x: Add gpmc dma channel
2015-10-15 17:37 [PATCH v2 0/5] mtd: nand: Fix support for NAND DMA prefetch Franklin S Cooper Jr
` (2 preceding siblings ...)
2015-10-15 17:37 ` [PATCH v2 3/5] mtd: nand: omap2: Fix high memory dma prefetch transfer Franklin S Cooper Jr
@ 2015-10-15 17:37 ` Franklin S Cooper Jr
2015-11-30 19:06 ` Tony Lindgren
2015-10-15 17:37 ` [PATCH v2 5/5] ARM: OMAP2+: Update GPMC and NAND DT binding documentation Franklin S Cooper Jr
` (2 subsequent siblings)
6 siblings, 1 reply; 10+ messages in thread
From: Franklin S Cooper Jr @ 2015-10-15 17:37 UTC (permalink / raw)
To: linux-kernel, rogerq, devicetree, linux-omap, linux-mtd, nsekhar,
computersforpeace, dwmw2, tony
Cc: Franklin S Cooper Jr
Add dma channel information to the gpmc. Although not enabled by
default this will allow prefetch-dma to be used.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
---
V2 Changes:
Added DMA entry for OMAP4 and OMAP5
arch/arm/boot/dts/am33xx.dtsi | 2 ++
arch/arm/boot/dts/am4372.dtsi | 2 ++
arch/arm/boot/dts/dm816x.dtsi | 2 ++
arch/arm/boot/dts/omap3.dtsi | 2 ++
arch/arm/boot/dts/omap4.dtsi | 2 ++
arch/arm/boot/dts/omap5.dtsi | 2 ++
6 files changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index e065f21..f2d8eed 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -819,6 +819,8 @@
ti,no-idle-on-init;
reg = <0x50000000 0x2000>;
interrupts = <100>;
+ dmas = <&edma 52>;
+ dma-names = "rxtx";
gpmc,num-cs = <7>;
gpmc,num-waitpins = <2>;
#address-cells = <2>;
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index ec8b7a3..c02061b 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -841,6 +841,8 @@
gpmc: gpmc@50000000 {
compatible = "ti,am3352-gpmc";
ti,hwmods = "gpmc";
+ dmas = <&edma 52>;
+ dma-names = "rxtx";
clocks = <&l3s_gclk>;
clock-names = "fck";
reg = <0x50000000 0x2000>;
diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi
index 68fb444..d2e5d31 100644
--- a/arch/arm/boot/dts/dm816x.dtsi
+++ b/arch/arm/boot/dts/dm816x.dtsi
@@ -180,6 +180,8 @@
#address-cells = <2>;
#size-cells = <1>;
interrupts = <100>;
+ dmas = <&edma 52>;
+ dma-names = "rxtx";
gpmc,num-cs = <6>;
gpmc,num-waitpins = <2>;
gpio-controller;
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 7f212b6..9dbbcf6 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -717,6 +717,8 @@
ti,hwmods = "gpmc";
reg = <0x6e000000 0x02d0>;
interrupts = <20>;
+ dmas = <&sdma 4>;
+ dma-names = "rxtx";
gpmc,num-cs = <8>;
gpmc,num-waitpins = <4>;
#address-cells = <2>;
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 5a206c1..32b65be 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -354,6 +354,8 @@
#address-cells = <2>;
#size-cells = <1>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&sdma 4>;
+ dma-names = "rxtx";
gpmc,num-cs = <8>;
gpmc,num-waitpins = <4>;
ti,hwmods = "gpmc";
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 4c04389..ca3c17f 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -391,6 +391,8 @@
#address-cells = <2>;
#size-cells = <1>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&sdma 4>;
+ dma-names = "rxtx";
gpmc,num-cs = <8>;
gpmc,num-waitpins = <4>;
ti,hwmods = "gpmc";
--
2.6.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v2 5/5] ARM: OMAP2+: Update GPMC and NAND DT binding documentation
2015-10-15 17:37 [PATCH v2 0/5] mtd: nand: Fix support for NAND DMA prefetch Franklin S Cooper Jr
` (3 preceding siblings ...)
2015-10-15 17:37 ` [PATCH v2 4/5] ARM: dts: am437x/am33xx/omap/dm816x: Add gpmc dma channel Franklin S Cooper Jr
@ 2015-10-15 17:37 ` Franklin S Cooper Jr
2015-10-16 8:11 ` [PATCH v2 0/5] mtd: nand: Fix support for NAND DMA prefetch Roger Quadros
[not found] ` <1444930648-19313-1-git-send-email-fcooper-l0cyMroinI0@public.gmane.org>
6 siblings, 0 replies; 10+ messages in thread
From: Franklin S Cooper Jr @ 2015-10-15 17:37 UTC (permalink / raw)
To: linux-kernel, rogerq, devicetree, linux-omap, linux-mtd, nsekhar,
computersforpeace, dwmw2, tony
Cc: Franklin S Cooper Jr
Add additional details to the GPMC NAND documentation to clarify
what is needed to enable NAND DMA prefetch.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
---
V2 Changes:
Replace nand and Nand with NAND
Specify the value dma-names should be set to
Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt | 7 ++++++-
Documentation/devicetree/bindings/mtd/gpmc-nand.txt | 2 ++
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt b/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
index 704be93..afae4b3 100644
--- a/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
@@ -33,6 +33,10 @@ Required properties:
As this will change in the future, filling correct
values here is a requirement.
+GPMC DMA information.
+ - dmas GPMC NAND prefetch dma channel
+ - dma-names Must be set to "rxtx"
+
Timing properties for child nodes. All are optional and default to 0.
- gpmc,sync-clk-ps: Minimum clock period for synchronous mode, in picoseconds
@@ -119,7 +123,8 @@ Example for an AM33xx board:
ti,hwmods = "gpmc";
reg = <0x50000000 0x2000>;
interrupts = <100>;
-
+ dmas = <&edma 52>;
+ dma-names = "rxtx";
gpmc,num-cs = <8>;
gpmc,num-waitpins = <2>;
#address-cells = <2>;
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
index 253e6de..4b0c240 100644
--- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
@@ -61,6 +61,8 @@ Example for an AM33xx board:
ti,hwmods = "gpmc";
reg = <0x50000000 0x36c>;
interrupts = <100>;
+ dmas = <&edma 52>;
+ dma-names = "rxtx";
gpmc,num-cs = <8>;
gpmc,num-waitpins = <2>;
#address-cells = <2>;
--
2.6.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/5] mtd: nand: Fix support for NAND DMA prefetch
2015-10-15 17:37 [PATCH v2 0/5] mtd: nand: Fix support for NAND DMA prefetch Franklin S Cooper Jr
` (4 preceding siblings ...)
2015-10-15 17:37 ` [PATCH v2 5/5] ARM: OMAP2+: Update GPMC and NAND DT binding documentation Franklin S Cooper Jr
@ 2015-10-16 8:11 ` Roger Quadros
[not found] ` <1444930648-19313-1-git-send-email-fcooper-l0cyMroinI0@public.gmane.org>
6 siblings, 0 replies; 10+ messages in thread
From: Roger Quadros @ 2015-10-16 8:11 UTC (permalink / raw)
To: Franklin S Cooper Jr, linux-kernel, devicetree, linux-omap,
linux-mtd, nsekhar, computersforpeace, dwmw2, tony
On 15/10/15 20:37, Franklin S Cooper Jr wrote:
> NAND DMA prefetch has been broken for awhile and seems to have only
> worked for SDMA based devices
>
> This patchset fixes DMA prefetch to work on both EDMA and SDMA devices
>
> Test on:
> am335x gp evm
> am437x gp evm
> am37x gp evm
>
> This patchset depends on Roger Quadros recent v4 GPMC/NAND patchset
> https://github.com/rogerq/linux.git
> branch: for-v4.4/gpmc-v4
>
> Franklin S Cooper Jr (5):
> mtd: nand: omap2: Support parsing dma channel information from DT
> mtd: nand: omap2: Start dma request before enabling prefetch
> mtd: nand: omap2: Fix high memory dma prefetch transfer
> ARM: dts: am437x/am33xx/omap/dm816x: Add gpmc dma channel
> ARM: OMAP2+: Update GPMC and NAND DT binding documentation
>
> .../bindings/memory-controllers/omap-gpmc.txt | 7 +++++-
> .../devicetree/bindings/mtd/gpmc-nand.txt | 2 ++
> arch/arm/boot/dts/am33xx.dtsi | 2 ++
> arch/arm/boot/dts/am4372.dtsi | 2 ++
> arch/arm/boot/dts/dm816x.dtsi | 2 ++
> arch/arm/boot/dts/omap3.dtsi | 2 ++
> arch/arm/boot/dts/omap4.dtsi | 2 ++
> arch/arm/boot/dts/omap5.dtsi | 2 ++
> drivers/mtd/nand/omap2.c | 27 +++++++++-------------
> 9 files changed, 31 insertions(+), 17 deletions(-)
>
For all patches,
Acked-by: Roger Quadros <rogerq@ti.com>
--
cheers,
-roger
^ permalink raw reply [flat|nested] 10+ messages in thread
[parent not found: <1444930648-19313-1-git-send-email-fcooper-l0cyMroinI0@public.gmane.org>]
* Re: [PATCH v2 0/5] mtd: nand: Fix support for NAND DMA prefetch
[not found] ` <1444930648-19313-1-git-send-email-fcooper-l0cyMroinI0@public.gmane.org>
@ 2015-12-18 18:04 ` Brian Norris
[not found] ` <20151218180434.GJ10460-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
0 siblings, 1 reply; 10+ messages in thread
From: Brian Norris @ 2015-12-18 18:04 UTC (permalink / raw)
To: Franklin S Cooper Jr
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA, rogerq-l0cyMroinI0,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-omap-u79uwXL29TY76Z2rM5mHXA,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, nsekhar-l0cyMroinI0,
dwmw2-wEGCiKHe2LqWVfeAwA7xHQ, tony-4v6yS6AI5VpBDgjK7y7TUQ
On Thu, Oct 15, 2015 at 12:37:23PM -0500, Franklin S Cooper Jr wrote:
> NAND DMA prefetch has been broken for awhile and seems to have only
> worked for SDMA based devices
>
> This patchset fixes DMA prefetch to work on both EDMA and SDMA devices
>
> Test on:
> am335x gp evm
> am437x gp evm
> am37x gp evm
>
> This patchset depends on Roger Quadros recent v4 GPMC/NAND patchset
> https://github.com/rogerq/linux.git
> branch: for-v4.4/gpmc-v4
In what way does this depend on the other series? Can any of this be
taken without it? If not, then perhaps it'd be good if Roger can roll
this into his series? Just throwing out ideas. If you want to wait on
Roger's series, that's fine.
FWIW, the MTD stuff all looks OK to me:
Acked-by: Brian Norris <computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> Franklin S Cooper Jr (5):
> mtd: nand: omap2: Support parsing dma channel information from DT
> mtd: nand: omap2: Start dma request before enabling prefetch
> mtd: nand: omap2: Fix high memory dma prefetch transfer
> ARM: dts: am437x/am33xx/omap/dm816x: Add gpmc dma channel
> ARM: OMAP2+: Update GPMC and NAND DT binding documentation
>
> .../bindings/memory-controllers/omap-gpmc.txt | 7 +++++-
> .../devicetree/bindings/mtd/gpmc-nand.txt | 2 ++
> arch/arm/boot/dts/am33xx.dtsi | 2 ++
> arch/arm/boot/dts/am4372.dtsi | 2 ++
> arch/arm/boot/dts/dm816x.dtsi | 2 ++
> arch/arm/boot/dts/omap3.dtsi | 2 ++
> arch/arm/boot/dts/omap4.dtsi | 2 ++
> arch/arm/boot/dts/omap5.dtsi | 2 ++
> drivers/mtd/nand/omap2.c | 27 +++++++++-------------
> 9 files changed, 31 insertions(+), 17 deletions(-)
>
> --
> 2.6.1
>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 10+ messages in thread