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From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Chen-Yu Tsai <wens@csie.org>
Cc: Emilio Lopez <emilio@elopez.com.ar>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Kumar Gala <galak@codeaurora.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-sunxi <linux-sunxi@googlegroups.com>
Subject: Re: [PATCH v4 1/5] clk: sunxi: Add CLK_OF_DECLARE support for sun8i-a23-apb0-clk driver
Date: Tue, 1 Dec 2015 13:50:32 +0100	[thread overview]
Message-ID: <20151201125032.GH29263@lukather> (raw)
In-Reply-To: <CAGb2v66bJJZ_xmD8B2X6nR3bxte9CdrnBpnd1KMRTmyRTr1KRQ@mail.gmail.com>

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On Tue, Dec 01, 2015 at 07:54:06PM +0800, Chen-Yu Tsai wrote:
> On Tue, Dec 1, 2015 at 6:04 PM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > Hi,
> >
> > On Sun, Nov 29, 2015 at 11:03:06AM +0800, Chen-Yu Tsai wrote:
> >> The APBS clock on sun9i is the same as the APB0 clock on sun8i. With
> >> sun9i we are supporting the PRCM clocks by using CLK_OF_DECLARE,
> >> instead of through a PRCM mfd device and subdevices for each clock
> >> and reset control. As such we need a CLK_OF_DECLARE version of
> >> the sun8i-a23-apb0-clk driver.
> >>
> >> Also, build it for sun9i/A80, and not just for configurations with
> >> MFD_SUN6I_PRCM enabled.
> >>
> >> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> >> ---
> >>  drivers/clk/sunxi/Makefile         |  5 +--
> >>  drivers/clk/sunxi/clk-sun8i-apb0.c | 71 +++++++++++++++++++++++++++++++-------
> >>  2 files changed, 62 insertions(+), 14 deletions(-)
> >>
> >> diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
> >> index cb4c299214ce..c55d5cd1c0e5 100644
> >> --- a/drivers/clk/sunxi/Makefile
> >> +++ b/drivers/clk/sunxi/Makefile
> >> @@ -15,6 +15,7 @@ obj-y += clk-sun9i-core.o
> >>  obj-y += clk-sun9i-mmc.o
> >>  obj-y += clk-usb.o
> >>
> >> +obj-$(CONFIG_MACH_SUN9I) += clk-sun8i-apb0.o
> >> +
> >
> > So sun8i doesn't use it?
> 
> Shit... I messed up. clk-sun8i-apb0.o should also be under
> CONFIG_MFD_SUN6I_PRCM.
> 
> I'll send a new version of this patch. No need to keep spamming
> people with the whole series.

Ok.

> >>  obj-$(CONFIG_MFD_SUN6I_PRCM) += \
> >> -     clk-sun6i-ar100.o clk-sun6i-apb0.o clk-sun6i-apb0-gates.o \
> >> -     clk-sun8i-apb0.o
> >> +     clk-sun6i-ar100.o clk-sun6i-apb0.o clk-sun6i-apb0-gates.o
> >> diff --git a/drivers/clk/sunxi/clk-sun8i-apb0.c b/drivers/clk/sunxi/clk-sun8i-apb0.c
> >> index 7ae5d2c2cde1..c1e2ac8f4b0d 100644
> >> --- a/drivers/clk/sunxi/clk-sun8i-apb0.c
> >> +++ b/drivers/clk/sunxi/clk-sun8i-apb0.c
> >> @@ -17,13 +17,68 @@
> >>  #include <linux/clk-provider.h>
> >>  #include <linux/module.h>
> >>  #include <linux/of.h>
> >> +#include <linux/of_address.h>
> >>  #include <linux/platform_device.h>
> >>
> >> +static struct clk *sun8i_a23_apb0_register(struct device_node *node,
> >> +                                        void __iomem *reg)
> >> +{
> >> +     const char *clk_name = node->name;
> >> +     const char *clk_parent;
> >> +     struct clk *clk;
> >> +     int ret;
> >> +
> >> +     clk_parent = of_clk_get_parent_name(node, 0);
> >> +     if (!clk_parent)
> >> +             return ERR_PTR(-EINVAL);
> >> +
> >> +     of_property_read_string(node, "clock-output-names", &clk_name);
> >> +
> >> +     /* The A23 APB0 clock is a standard 2 bit wide divider clock */
> >> +     clk = clk_register_divider(NULL, clk_name, clk_parent, 0, reg,
> >> +                                0, 2, CLK_DIVIDER_POWER_OF_TWO, NULL);
> >> +     if (IS_ERR(clk))
> >> +             return clk;
> >> +
> >> +     ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);
> >> +     if (ret)
> >> +             goto err_unregister;
> >> +
> >> +     return clk;
> >> +
> >> +err_unregister:
> >> +     clk_unregister_divider(clk);
> >> +
> >> +     return ERR_PTR(ret);
> >> +}
> >> +
> >> +static void sun8i_a23_apb0_setup(struct device_node *node)
> >> +{
> >> +     void __iomem *reg;
> >> +     struct resource res;
> >> +     struct clk *clk;
> >> +
> >> +     reg = of_io_request_and_map(node, 0, of_node_full_name(node));
> >> +     if (IS_ERR(reg))
> >> +             return;
> >> +
> >> +     clk = sun8i_a23_apb0_register(node, reg);
> >> +     if (IS_ERR(clk))
> >> +             goto err_unmap;
> >> +
> >> +     return;
> >> +
> >> +err_unmap:
> >> +     iounmap(reg);
> >> +     of_address_to_resource(node, 0, &res);
> >> +     release_mem_region(res.start, resource_size(&res));
> >> +}
> >> +CLK_OF_DECLARE(sun8i_a23_apb0, "allwinner,sun8i-a23-apb0-clk",
> >> +            sun8i_a23_apb0_setup);
> >> +
> >>  static int sun8i_a23_apb0_clk_probe(struct platform_device *pdev)
> >>  {
> >>       struct device_node *np = pdev->dev.of_node;
> >> -     const char *clk_name = np->name;
> >> -     const char *clk_parent;
> >>       struct resource *r;
> >>       void __iomem *reg;
> >>       struct clk *clk;
> >> @@ -33,19 +88,11 @@ static int sun8i_a23_apb0_clk_probe(struct platform_device *pdev)
> >>       if (IS_ERR(reg))
> >>               return PTR_ERR(reg);
> >>
> >> -     clk_parent = of_clk_get_parent_name(np, 0);
> >> -     if (!clk_parent)
> >> -             return -EINVAL;
> >> -
> >> -     of_property_read_string(np, "clock-output-names", &clk_name);
> >> -
> >> -     /* The A23 APB0 clock is a standard 2 bit wide divider clock */
> >> -     clk = clk_register_divider(&pdev->dev, clk_name, clk_parent, 0, reg,
> >> -                                0, 2, CLK_DIVIDER_POWER_OF_TWO, NULL);
> >> +     clk = sun8i_a23_apb0_register(np, reg);
> >>       if (IS_ERR(clk))
> >>               return PTR_ERR(clk);
> >>
> >> -     return of_clk_add_provider(np, of_clk_src_simple_get, clk);
> >> +     return 0;
> >>  }
> >
> > Won't this probe twice now? First the CLK_OF_DECLARE will register a
> > clock, and then the device model will call probe a second time.
> 
> AFAIK it will.
> 
> > I guess then request_mem_region will catch it, but then you return an
> > error code, which is probably an error success, since the clock is
> > registered :)
> 
> Indeed. clk-mod0.c actually has a comment block explaining this.
> I didn't want to repeat the whole thing though.

I guess, we can simply return 0 if of_io_request_and_map returns
EBUSY, since it would simply mean that we already probed.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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  reply	other threads:[~2015-12-01 12:50 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-29  3:03 [PATCH v4 0/5] ARM: sun9i: Add Allwinner A80 PRCM clock/reset support Chen-Yu Tsai
     [not found] ` <1448766190-11345-1-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2015-11-29  3:03   ` [PATCH v4 1/5] clk: sunxi: Add CLK_OF_DECLARE support for sun8i-a23-apb0-clk driver Chen-Yu Tsai
2015-12-01 10:04     ` Maxime Ripard
2015-12-01 11:54       ` Chen-Yu Tsai
2015-12-01 12:50         ` Maxime Ripard [this message]
2015-12-01 14:19           ` Chen-Yu Tsai
2015-12-01 14:39             ` Chen-Yu Tsai
2015-11-29  3:03   ` [PATCH v4 2/5] clk: sunxi: Add sun9i A80 apbs gates support Chen-Yu Tsai
2015-11-30 17:14     ` Rob Herring
2015-12-01 11:16       ` Maxime Ripard
2015-11-29  3:03   ` [PATCH v4 3/5] clk: sunxi: Add sun9i A80 cpus (cpu special) clock support Chen-Yu Tsai
2015-11-30 17:13     ` Rob Herring
2015-12-01 13:07       ` Maxime Ripard
2015-11-29  3:03   ` [PATCH v4 4/5] ARM: dts: sun9i: Add A80 PRCM clocks and reset control nodes Chen-Yu Tsai
2015-11-29  3:03   ` [PATCH v4 5/5] ARM: dts: sun9i: Add TODO comments for the main and low power clocks Chen-Yu Tsai
     [not found]     ` <1448766190-11345-6-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2015-12-01 13:08       ` Maxime Ripard

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