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From: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
To: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
	Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 1/2] ARM: l2x0: make it possible to disable outer sync from DT
Date: Thu, 10 Dec 2015 14:32:26 +0000	[thread overview]
Message-ID: <20151210142942.GB495@leverpostej> (raw)
In-Reply-To: <1449756855-19473-1-git-send-email-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>

On Thu, Dec 10, 2015 at 03:14:15PM +0100, Linus Walleij wrote:
> Some RealView platforms have broken outer_sync, see:
> http://marc.info/?l=linux-kernel&m=144846940516899&w=2
> 
> We got rid of the custom barriers from the machine by disabling
> outer sync, but that was just for the boardfile case. We have
> to be able to do the same in the device tree case.
> 
> Since __l2c_init() is cloning and copying the L2C vtable,
> we pass an argument to this function to optionally numb
> the outer sync operation if desired, before initializing
> the cache.
> 
> After this we can set up the cache correctly on the RealView
> PB11MPCore, and it boots rock solid with the cache enabled.
> Before this, spurious crashes would occur if we try to set
> up the cache properly.
> 
> Cc: Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>
> Cc: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Signed-off-by: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> ---
>  Documentation/devicetree/bindings/arm/l2cc.txt |  1 +
>  arch/arm/mm/cache-l2x0.c                       | 13 ++++++++++---
>  2 files changed, 11 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bindings/arm/l2cc.txt
> index d181b7c4c522..aae7387acbdb 100644
> --- a/Documentation/devicetree/bindings/arm/l2cc.txt
> +++ b/Documentation/devicetree/bindings/arm/l2cc.txt
> @@ -75,6 +75,7 @@ Optional properties:
>    specified to indicate that such transforms are precluded.
>  - arm,parity-enable : enable parity checking on the L2 cache (L220 or PL310).
>  - arm,parity-disable : disable parity checking on the L2 cache (L220 or PL310).
> +- arm,outer-sync-disable : disable the outer sync operation on the L2 cache.

I'm not sure what this means from a HW perspective. The "outer sync"
operation is Linux terminology and doesn't show up in the TRM for L220.

What is the (integration? HW?) bug that we're trying to avoid the effect
of? It sounds like we should be describing that.

We should at least have a better definition of what this means we must
avoid.

Thanks
Mark.
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  parent reply	other threads:[~2015-12-10 14:32 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-10 14:14 [PATCH 1/2] ARM: l2x0: make it possible to disable outer sync from DT Linus Walleij
     [not found] ` <1449756855-19473-1-git-send-email-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-12-10 14:20   ` Arnd Bergmann
2015-12-14 13:23     ` Linus Walleij
2015-12-10 14:32   ` Mark Rutland [this message]
2015-12-14 13:30     ` Linus Walleij
     [not found]       ` <CACRpkdayPdJDKPh=6vH5p5gWCu1uetBVdbEJz8Pvw79bujmQrg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-12-14 13:32         ` Will Deacon

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