From: Michael Turquette <mturquette@baylibre.com>
To: Stephen Boyd <sboyd@codeaurora.org>,
Stephen Warren <swarren@wwwdotorg.org>,
Lee Jones <lee@kernel.org>, Eric Anholt <eric@anholt.net>,
Remi Pommarel <repk@triplefau.lt>,
linux-clk@vger.kernel.org, linux-rpi-kernel@lists.infradead.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org
Cc: Martin Sperl <kernel@martin.sperl.org>
Subject: Re: [PATCH V2 1/4] clk: bcm2835: avoid the use of BCM2835_CLOCK_COUNT in clk-bcm2835
Date: Wed, 13 Jan 2016 16:13:58 -0800 [thread overview]
Message-ID: <20160114001358.1168.5768@quark.deferred.io> (raw)
In-Reply-To: <20160113200012.1168.74515@quark.deferred.io>
Quoting Michael Turquette (2016-01-13 12:00:12)
> Hi Martin,
>
> Quoting kernel@martin.sperl.org (2016-01-11 11:55:53)
> > static int bcm2835_clk_probe(struct platform_device *pdev)
> > {
> > struct device *dev = &pdev->dev;
> > struct clk **clks;
> > + size_t clk_cnt;
> > struct bcm2835_cprman *cprman;
> > struct resource *res;
> > + size_t i;
> > +
> > + /* find the max clock index */
> > + clk_cnt = BCM2835_CLOCK_PERI_IMAGE; /* see below */
> > + for (i = 0; i < ARRAY_SIZE(bcm2835_register_clocks); i++)
> > + clk_cnt = max(clk_cnt, bcm2835_register_clocks[i].index);
> > + clk_cnt += 1;
>
> I'm not sure how this solution is better than using CLOCK_COUNT. Some
> other bindings use a max value, NR_CLKS or other sentinel.
>
> Why did you not choose to set clk_cnt equal to BCM2835_CLOCK_PWM? Why
> not initialize it to zero?
OK, I just caught up on the asoc/bcm2835 thread.
Really the best solution would be to have an array of all of the clks in
the driver and just use ARRAY_SIZE on it.
For your driver, could you make an array of clk_hw pointers and call
devm_clk_register on all of them in a loop? This gets rid of the big
pile of explicit calls in bcm2835_clk_probe.
You can also get rid of stuff like bcm2835_plla_core_data by just
stuffing that data into a single struct initialization. Here is a
snippet for how the qcom clk drivers do it:
static struct clk_pll gpll0 = {
.l_reg = 0x0004,
.m_reg = 0x0008,
.n_reg = 0x000c,
.config_reg = 0x0014,
.mode_reg = 0x0000,
.status_reg = 0x001c,
.status_bit = 17,
.clkr.hw.init = &(struct clk_init_data){
.name = "gpll0",
.parent_names = (const char *[]){ "xo" },
.num_parents = 1,
.ops = &clk_pll_ops,
},
};
Then a single array of clks per driver references this:
static struct clk_regmap *gcc_apq8084_clocks[] = {
[GPLL0] = &gpll0.clkr,
...
(in your case you won't reference struct clk_regmap, but struct clk_hw)
The actual registration happens in your probe like so:
static int bcm2835_clk_probe(struct platform_device *pdev)
{
...
for (i = 0; i < num_clks; i++) {
clk = devm_clk_register(dev, array_of_clks[i].hw)
...
}
Regards,
Mike
next prev parent reply other threads:[~2016-01-14 0:13 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-11 19:55 [PATCH V2 0/4] clk: bcm2835: add additinal clocks and add frac support kernel
2016-01-11 19:55 ` [PATCH V2 1/4] clk: bcm2835: avoid the use of BCM2835_CLOCK_COUNT in clk-bcm2835 kernel
2016-01-13 20:00 ` Michael Turquette
2016-01-14 0:13 ` Michael Turquette [this message]
2016-01-14 12:11 ` Martin Sperl
2016-01-14 20:23 ` Michael Turquette
2016-01-14 21:24 ` Martin Sperl
2016-01-11 19:55 ` [PATCH V2 2/4] clk: bcm2835: enable fractional and mash support kernel
2016-01-13 20:07 ` Michael Turquette
2016-01-11 19:55 ` [PATCH V2 3/4] clk: bcm2835: enable management of PCM clock kernel
[not found] ` <1452542157-2387-4-git-send-email-kernel-TqfNSX0MhmxHKSADF0wUEw@public.gmane.org>
2016-01-13 20:11 ` Michael Turquette
2016-01-11 19:55 ` [PATCH V2 4/4] clk: bcm2835: add missing 22 HW-clocks kernel
[not found] ` <1452542157-2387-1-git-send-email-kernel-TqfNSX0MhmxHKSADF0wUEw@public.gmane.org>
2016-01-11 21:01 ` [PATCH V2 0/4] clk: bcm2835: add additinal clocks and add frac support Arnd Bergmann
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