From mboxrd@z Thu Jan  1 00:00:00 1970
From: Antoine Tenart <antoine.tenart@free-electrons.com>
Subject: Re: [PATCH 2/3] arm64: dts: add the Alpine v2 EVP
Date: Tue, 9 Feb 2016 10:01:31 +0100
Message-ID: <20160209090131.GB5388@kwain>
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To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Antoine Tenart <antoine.tenart@free-electrons.com>, catalin.marinas@arm.com, will.deacon@arm.com, tsahee@annapurnalabs.com, linux-arm-kernel@lists.infradead.org, rshitrit@annapurnalabs.com, thomas.petazzoni@free-electrons.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Barak Wasserstrom <barak@annapurnalabs.com>
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On Tue, Feb 09, 2016 at 09:56:33AM +0100, Antoine Tenart wrote:
> Hi Marc,
>=20
> On Mon, Feb 08, 2016 at 03:29:33PM +0000, Marc Zyngier wrote:
> > On 08/02/16 09:11, Antoine Tenart wrote:
> >=20
> > > +		gic: gic@f0100000 {
> > > +			compatible =3D "arm,gic-v3";
> > > +			reg =3D <0x0 0xf0200000 0x0 0x10000>,	/* GIC Dist */
> > > +			      <0x0 0xf0280000 0x0 0x200000>,	/* GICR */
> > > +			      <0x0 0xf0100000 0x0 0x2000>;	/* GICC */
> > > +			interrupt-controller;
> > > +			#interrupt-cells =3D <3>;
> > > +		};
> >=20
> > Something is wrong here. Either you are missing GICH and GICV (assuming
> > you have legacy support), or you have an extra GICC region (which
> > doesn't make sense on its own).
>=20
> I'll add the missing regions.

Hmm, in fact the GICC region shouldn't be there. I'll make some tests
and remove it.

Antoine

--=20
Antoine T=E9nart, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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