From: Paul Burton <paul.burton@imgtec.com>
To: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Cc: bhelgaas@google.com, michals@xilinx.com,
lorenzo.pieralisi@arm.com, yinghai@kernel.org,
wangyijing@huawei.com, robh@kernel.org, russell.joyce@york.ac.uk,
sorenb@xilinx.com, jiang.liu@linux.intel.com, arnd@arndb.de,
pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
Bharat Kumar Gogada <bharatku@xilinx.com>,
Ravi Kiran Gummaluri <rgummal@xilinx.com>
Subject: Re: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze
Date: Tue, 9 Feb 2016 08:11:34 -0800 [thread overview]
Message-ID: <20160209161134.GA24244@NP-P-BURTON> (raw)
In-Reply-To: <1455014518-8708-4-git-send-email-bharatku@xilinx.com>
On Tue, Feb 09, 2016 at 04:11:56PM +0530, Bharat Kumar Gogada wrote:
> Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both
> Zynq and Microblaze Architectures.
> With these modifications drivers/pci/host/pcie-xilinx.c, will
> work on both Zynq and Microblaze Architectures.
>
> Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
> ---
> Changes:
> Removed unneccessary architecture dependent number of MSI's.
> Added #ifdef to pci_fixup_irqs which is ARM specific API.
Hi Bharat,
Why do you say pci_fixup_irqs is ARM-specific? It's declared in
include/linux/pci.h, defined in drivers/pci/setup-irq.c & used by
multiple architectures (alpha, arm, m68k, mips, sh, sparc, tile,
unicore32 from a quick grep).
Will you not break INTX-style interrupts by removing this?
Thanks,
Paul
> ---
> drivers/pci/host/pcie-xilinx.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c
> index 13fec35..6cbce34 100644
> --- a/drivers/pci/host/pcie-xilinx.c
> +++ b/drivers/pci/host/pcie-xilinx.c
> @@ -704,7 +704,9 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
> #endif
> pci_scan_child_bus(bus);
> pci_assign_unassigned_bus_resources(bus);
> +#ifdef CONFIG_ARM
> pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
> +#endif
> pci_bus_add_devices(bus);
> platform_set_drvdata(pdev, port);
>
> --
> 2.1.1
>
next prev parent reply other threads:[~2016-02-09 16:11 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-09 10:41 [PATCH V3 0/5] PCIe Xilinx generic driver for Microblaze and Bharat Kumar Gogada
2016-02-09 10:41 ` [PATCH V3 1/5] PCI: xilinx: Removing xilinx_pcie_parse_and_add_res function Bharat Kumar Gogada
2016-02-09 10:41 ` [PATCH V3 2/5] PCI: xilinx: Removing struct hw_pci structure Bharat Kumar Gogada
2016-02-09 10:41 ` [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Bharat Kumar Gogada
2016-02-09 16:11 ` Paul Burton [this message]
2016-02-10 5:55 ` Bharat Kumar Gogada
2016-02-10 17:27 ` Paul Burton
2016-02-10 20:40 ` Arnd Bergmann
2016-02-11 5:37 ` Bharat Kumar Gogada
2016-02-09 10:41 ` [PATCH V3 4/5] PCI: xilinx: Updating Zynq PCI binding documentation with Microblaze node Bharat Kumar Gogada
2016-02-09 10:41 ` [PATCH V3 5/5] Microblaze: Modifying microblaze PCI subsytem to support generic Xilinx AXI PCIe Host Bridge IP driver Bharat Kumar Gogada
2016-02-09 14:41 ` [PATCH V3 0/5] PCIe Xilinx generic driver for Microblaze and Arnd Bergmann
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