[PATCH v4 0/3] ata: Fixes related to edge trigger latch for the ahci_xgene_driver.

[PATCH v4 0/3] ata: Fixes related to edge trigger latch for the ahci_xgene_driver.

[suman Tripathi]

From: Suman Tripathi <stripathi-qTEPVZfXA3Y@public.gmane.org>

This patch set implements a workaround for an errate in the APM
X-Gene SATA host controller with edge interrupt. The HOST_IRQ_STAT
misses the edge interrupt from the PORT_IRQ_STAT when clearing the
HOST_IRQ_STAT and reporting the PORT_IRQ_STAT happens in same clock
cycle. It also implements the capability to override generic interrupt
handler.

v1 change:
* Implement the capability for LDD to override interrupt handler.

* ahci_xgene driver implements the edge trigger interrupt handler.

v2 change:
* Remove the AHCI_HFLAG_EDGE_IRQ frim libahci.

v3 change:
* Reorder the patch sequence.

v4 change:
* Incorporate Tejun's changes.

Signed-off-by: Suman Tripathi <stripathi-qTEPVZfXA3Y@public.gmane.org>

Suman Tripathi (3):
  libahci: Implement the capability to override the generic ahci
    interrupt     handler.
  ata: Remove the AHCI_HFLAG_EDGE_IRQ support from libahci.
  ahci_xgene: Implement the workaround to fix the missing of the edge
      interrupt for the HOST_IRQ_STAT.

 drivers/ata/ahci.h       |    5 ++-
 drivers/ata/ahci_xgene.c |   85 +++++++++++++++++++++++++++++++++++++++++++++-
 drivers/ata/libahci.c    |   62 +++++++++------------------------
 3 files changed, 104 insertions(+), 48 deletions(-)

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[PATCH v4 1/3] libahci: Implement the capability to override the generic ahci interrupt handler.

[suman Tripathi]

From: Suman Tripathi <stripathi@apm.com>

This patch implements the capability to override the generic AHCI
interrupt handler so that the LDD drivers can implement their own
custom interrupt handler routines.

Signed-off-by: Suman Tripathi <stripathi@apm.com>
---
 drivers/ata/ahci.h    |    2 ++
 drivers/ata/libahci.c |   29 +++++++++++++++++++++--------
 2 files changed, 23 insertions(+), 8 deletions(-)

diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index a4faa43..e64bdad 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -360,6 +360,7 @@ struct ahci_host_priv {
 	 * be overridden anytime before the host is activated.
 	 */
 	void			(*start_engine)(struct ata_port *ap);
+	irqreturn_t 		(*ahci_irq_handler)(int irq, void *dev_instance);
 };

 #ifdef CONFIG_PCI_MSI
@@ -423,6 +424,7 @@ int ahci_reset_em(struct ata_host *host);
 void ahci_print_info(struct ata_host *host, const char *scc_s);
 int ahci_host_activate(struct ata_host *host, struct scsi_host_template *sht);
 void ahci_error_handler(struct ata_port *ap);
+u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked);

 static inline void __iomem *__ahci_port_base(struct ata_host *host,
 					     unsigned int port_no)
diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c
index eda3cf2..d45a7a5 100644
--- a/drivers/ata/libahci.c
+++ b/drivers/ata/libahci.c
@@ -113,6 +113,9 @@ static ssize_t ahci_store_em_buffer(struct device *dev,
 				    const char *buf, size_t size);
 static ssize_t ahci_show_em_supported(struct device *dev,
 				      struct device_attribute *attr, char *buf);
+static irqreturn_t ahci_single_edge_irq_intr(int irq, void *dev_instance);
+
+static irqreturn_t ahci_single_level_irq_intr(int irq, void *dev_instance);

 static DEVICE_ATTR(ahci_host_caps, S_IRUGO, ahci_show_host_caps, NULL);
 static DEVICE_ATTR(ahci_host_cap2, S_IRUGO, ahci_show_host_cap2, NULL);
@@ -512,6 +515,11 @@ void ahci_save_initial_config(struct device *dev, struct ahci_host_priv *hpriv)

 	if (!hpriv->start_engine)
 		hpriv->start_engine = ahci_start_engine;
+
+	if (!hpriv->ahci_irq_handler)
+		hpriv->ahci_irq_handler = (hpriv->flags & AHCI_HFLAG_EDGE_IRQ) ?
+					   ahci_single_edge_irq_intr :
+					   ahci_single_level_irq_intr;
 }
 EXPORT_SYMBOL_GPL(ahci_save_initial_config);

@@ -1816,7 +1824,7 @@ static irqreturn_t ahci_multi_irqs_intr_hard(int irq, void *dev_instance)
 	return IRQ_HANDLED;
 }

-static u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked)
+u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked)
 {
 	unsigned int i, handled = 0;

@@ -1842,6 +1850,7 @@ static u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked)

 	return handled;
 }
+EXPORT_SYMBOL_GPL(ahci_handle_port_intr);

 static irqreturn_t ahci_single_edge_irq_intr(int irq, void *dev_instance)
 {
@@ -2505,14 +2514,18 @@ int ahci_host_activate(struct ata_host *host, struct scsi_host_template *sht)
 	int irq = hpriv->irq;
 	int rc;

-	if (hpriv->flags & (AHCI_HFLAG_MULTI_MSI | AHCI_HFLAG_MULTI_MSIX))
+	if (hpriv->flags & (AHCI_HFLAG_MULTI_MSI | AHCI_HFLAG_MULTI_MSIX)) {
+		if (hpriv->ahci_irq_handler)
+			dev_warn(host->dev, "both AHCI_HFLAG_MULTI_MSI flag set \
+				 and custom irq handler implemented\n");
+
 		rc = ahci_host_activate_multi_irqs(host, sht);
-	else if (hpriv->flags & AHCI_HFLAG_EDGE_IRQ)
-		rc = ata_host_activate(host, irq, ahci_single_edge_irq_intr,
-				       IRQF_SHARED, sht);
-	else
-		rc = ata_host_activate(host, irq, ahci_single_level_irq_intr,
-				       IRQF_SHARED, sht);
+	} else {
+		rc = ata_host_activate(host, irq, hpriv->ahci_irq_handler,
+			       	       IRQF_SHARED, sht);
+	}
+
+
 	return rc;
 }
 EXPORT_SYMBOL_GPL(ahci_host_activate);
--
1.7.1

[PATCH v4 2/3] ata: Remove the AHCI_HFLAG_EDGE_IRQ support from libahci.

[suman Tripathi]

From: Suman Tripathi <stripathi@apm.com>

This patch removes the AHCI_HFLAG_EDGE_IRQ support from libahci.
The flexibility to override the irq handles in the LLD's are
already present, so controller's implementing a edge trigger latch
can implement their own interrupt handler inside the driver.

Signed-off-by: Suman Tripathi <stripathi@apm.com>
---
 drivers/ata/ahci.h       |    3 +--
 drivers/ata/ahci_xgene.c |   40 +++++++++++++++++++++++++++++++++++++++-
 drivers/ata/libahci.c    |   43 +------------------------------------------
 3 files changed, 41 insertions(+), 45 deletions(-)

diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index e64bdad..89d146e 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -240,8 +240,7 @@ enum {
 						        error-handling stage) */
 	AHCI_HFLAG_NO_DEVSLP		= (1 << 17), /* no device sleep */
 	AHCI_HFLAG_NO_FBS		= (1 << 18), /* no FBS */
-	AHCI_HFLAG_EDGE_IRQ		= (1 << 19), /* HOST_IRQ_STAT behaves as
-							Edge Triggered */
+
 #ifdef CONFIG_PCI_MSI
 	AHCI_HFLAG_MULTI_MSI		= (1 << 20), /* multiple PCI MSIs */
 	AHCI_HFLAG_MULTI_MSIX		= (1 << 21), /* per-port MSI-X */
diff --git a/drivers/ata/ahci_xgene.c b/drivers/ata/ahci_xgene.c
index e2c6d9e..38cbabd 100644
--- a/drivers/ata/ahci_xgene.c
+++ b/drivers/ata/ahci_xgene.c
@@ -548,6 +548,43 @@ softreset_retry:
 	return rc;
 }

+static irqreturn_t xgene_ahci_irq_intr(int irq, void *dev_instance)
+{
+	struct ata_host *host = dev_instance;
+	struct ahci_host_priv *hpriv;
+	unsigned int rc = 0;
+	void __iomem *mmio;
+	u32 irq_stat, irq_masked;
+
+	VPRINTK("ENTER\n");
+
+	hpriv = host->private_data;
+	mmio = hpriv->mmio;
+
+	/* sigh.  0xffffffff is a valid return from h/w */
+	irq_stat = readl(mmio + HOST_IRQ_STAT);
+	if (!irq_stat)
+		return IRQ_NONE;
+
+	irq_masked = irq_stat & hpriv->port_map;
+
+	spin_lock(&host->lock);
+
+	/*
+	 * HOST_IRQ_STAT behaves as edge triggered latch meaning that
+	 * it should be cleared before all the port events are cleared.
+	 */
+	writel(irq_stat, mmio + HOST_IRQ_STAT);
+
+	rc = ahci_handle_port_intr(host, irq_masked);
+
+	spin_unlock(&host->lock);
+
+	VPRINTK("EXIT\n");
+
+	return IRQ_RETVAL(rc);
+}
+
 static struct ata_port_operations xgene_ahci_v1_ops = {
 	.inherits = &ahci_ops,
 	.host_stop = xgene_ahci_host_stop,
@@ -779,7 +816,8 @@ skip_clk_phy:
 		hpriv->flags = AHCI_HFLAG_NO_NCQ;
 		break;
 	case XGENE_AHCI_V2:
-		hpriv->flags |= AHCI_HFLAG_YES_FBS | AHCI_HFLAG_EDGE_IRQ;
+		hpriv->flags |= AHCI_HFLAG_YES_FBS;
+		hpriv->ahci_irq_handler = xgene_ahci_irq_intr;
 		break;
 	default:
 		break;
diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c
index d45a7a5..c64f0db 100644
--- a/drivers/ata/libahci.c
+++ b/drivers/ata/libahci.c
@@ -113,8 +113,6 @@ static ssize_t ahci_store_em_buffer(struct device *dev,
 				    const char *buf, size_t size);
 static ssize_t ahci_show_em_supported(struct device *dev,
 				      struct device_attribute *attr, char *buf);
-static irqreturn_t ahci_single_edge_irq_intr(int irq, void *dev_instance);
-
 static irqreturn_t ahci_single_level_irq_intr(int irq, void *dev_instance);

 static DEVICE_ATTR(ahci_host_caps, S_IRUGO, ahci_show_host_caps, NULL);
@@ -517,9 +515,7 @@ void ahci_save_initial_config(struct device *dev, struct ahci_host_priv *hpriv)
 		hpriv->start_engine = ahci_start_engine;

 	if (!hpriv->ahci_irq_handler)
-		hpriv->ahci_irq_handler = (hpriv->flags & AHCI_HFLAG_EDGE_IRQ) ?
-					   ahci_single_edge_irq_intr :
-					   ahci_single_level_irq_intr;
+		hpriv->ahci_irq_handler = ahci_single_level_irq_intr;
 }
 EXPORT_SYMBOL_GPL(ahci_save_initial_config);

@@ -1852,43 +1848,6 @@ u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked)
 }
 EXPORT_SYMBOL_GPL(ahci_handle_port_intr);

-static irqreturn_t ahci_single_edge_irq_intr(int irq, void *dev_instance)
-{
-	struct ata_host *host = dev_instance;
-	struct ahci_host_priv *hpriv;
-	unsigned int rc = 0;
-	void __iomem *mmio;
-	u32 irq_stat, irq_masked;
-
-	VPRINTK("ENTER\n");
-
-	hpriv = host->private_data;
-	mmio = hpriv->mmio;
-
-	/* sigh.  0xffffffff is a valid return from h/w */
-	irq_stat = readl(mmio + HOST_IRQ_STAT);
-	if (!irq_stat)
-		return IRQ_NONE;
-
-	irq_masked = irq_stat & hpriv->port_map;
-
-	spin_lock(&host->lock);
-
-	/*
-	 * HOST_IRQ_STAT behaves as edge triggered latch meaning that
-	 * it should be cleared before all the port events are cleared.
-	 */
-	writel(irq_stat, mmio + HOST_IRQ_STAT);
-
-	rc = ahci_handle_port_intr(host, irq_masked);
-
-	spin_unlock(&host->lock);
-
-	VPRINTK("EXIT\n");
-
-	return IRQ_RETVAL(rc);
-}
-
 static irqreturn_t ahci_single_level_irq_intr(int irq, void *dev_instance)
 {
 	struct ata_host *host = dev_instance;
--
1.7.1

[PATCH v4 3/3] ahci_xgene: Implement the workaround to fix the missing of the edge interrupt for the HOST_IRQ_STAT.

[suman Tripathi]

From: Suman Tripathi <stripathi@apm.com>

Due to H/W errata, the HOST_IRQ_STAT register misses the edge interrupt
when clearing the HOST_IRQ_STAT register and hardware reporting the
PORT_IRQ_STAT register happens to be at the same clock cycle.

Signed-off-by: Suman Tripathi <stripathi@apm.com>
---
 drivers/ata/ahci_xgene.c |   47 +++++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 46 insertions(+), 1 deletions(-)

diff --git a/drivers/ata/ahci_xgene.c b/drivers/ata/ahci_xgene.c
index 38cbabd..2fc6b38 100644
--- a/drivers/ata/ahci_xgene.c
+++ b/drivers/ata/ahci_xgene.c
@@ -548,6 +548,51 @@ softreset_retry:
 	return rc;
 }

+/**
+ * xgene_ahci_handle_broken_edge_irq - Handle the broken irq.
+ * @ata_host: Host that recieved the irq
+ * @irq_masked: HOST_IRQ_STAT value
+ *
+ * For hardware with broken edge trigger latch
+ * the HOST_IRQ_STAT register misses the edge interrupt
+ * when clearing of HOST_IRQ_STAT register and hardware
+ * reporting the PORT_IRQ_STAT register at the
+ * same clock cycle.
+ * As such, the algorithm below outlines the workaround.
+ *
+ * 1. Read HOST_IRQ_STAT register and save the state.
+ * 2. Clear the HOST_IRQ_STAT register.
+ * 3. Read back the HOST_IRQ_STAT register.
+ * 4. If HOST_IRQ_STAT register equals to zero, then
+ *    traverse the rest of port's PORT_IRQ_STAT register
+ *    to check if an interrupt is triggered at that point else
+ *    go to step 6.
+ * 5. If PORT_IRQ_STAT register of rest ports is not equal to zero
+ *    then update the state of HOST_IRQ_STAT saved in step 1.
+ * 6. Handle port interrupts.
+ * 7. Exit
+ */
+static int xgene_ahci_handle_broken_edge_irq(struct ata_host *host,
+					     u32 irq_masked)
+{
+	struct ahci_host_priv *hpriv = host->private_data;
+	void __iomem *port_mmio;
+	int i;
+
+	if (!readl(hpriv->mmio + HOST_IRQ_STAT)) {
+		for (i = 0; i < host->n_ports; i++) {
+			if (irq_masked & (1 << i))
+				continue;
+
+			port_mmio = ahci_port_base(host->ports[i]);
+			if (readl(port_mmio + PORT_IRQ_STAT))
+				irq_masked |= (1 << i);
+		}
+	}
+
+	return ahci_handle_port_intr(host, irq_masked);
+}
+
 static irqreturn_t xgene_ahci_irq_intr(int irq, void *dev_instance)
 {
 	struct ata_host *host = dev_instance;
@@ -576,7 +621,7 @@ static irqreturn_t xgene_ahci_irq_intr(int irq, void *dev_instance)
 	 */
 	writel(irq_stat, mmio + HOST_IRQ_STAT);

-	rc = ahci_handle_port_intr(host, irq_masked);
+	rc = xgene_ahci_handle_broken_edge_irq(host, irq_masked);

 	spin_unlock(&host->lock);

--
1.7.1

Re: [PATCH v4 0/3] ata: Fixes related to edge trigger latch for the ahci_xgene_driver.

[Tejun Heo]

On Sat, Feb 06, 2016 at 11:25:21AM +0530, suman Tripathi wrote:
> From: Suman Tripathi <stripathi-qTEPVZfXA3Y@public.gmane.org>
> 
> This patch set implements a workaround for an errate in the APM
> X-Gene SATA host controller with edge interrupt. The HOST_IRQ_STAT
> misses the edge interrupt from the PORT_IRQ_STAT when clearing the
> HOST_IRQ_STAT and reporting the PORT_IRQ_STAT happens in same clock
> cycle. It also implements the capability to override generic interrupt
> handler.

Applied 1-3 to libata/for-4.6 with minor updates.

Thanks.

-- 
tejun
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Re: [PATCH v4 0/3] ata: Fixes related to edge trigger latch for the ahci_xgene_driver.

[Suman Tripathi]

Hi Tejun,

On Wed, Feb 10, 2016 at 8:25 AM, Tejun Heo <tj-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
> On Sat, Feb 06, 2016 at 11:25:21AM +0530, suman Tripathi wrote:
>> From: Suman Tripathi <stripathi-qTEPVZfXA3Y@public.gmane.org>
>>
>> This patch set implements a workaround for an errate in the APM
>> X-Gene SATA host controller with edge interrupt. The HOST_IRQ_STAT
>> misses the edge interrupt from the PORT_IRQ_STAT when clearing the
>> HOST_IRQ_STAT and reporting the PORT_IRQ_STAT happens in same clock
>> cycle. It also implements the capability to override generic interrupt
>> handler.
>
> Applied 1-3 to libata/for-4.6 with minor updates.

will this patchset  go to 4.5 ?

>
> Thanks.
>
> --
> tejun



-- 
Thanks,
with regards,
Suman Tripathi
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Re: [PATCH v4 0/3] ata: Fixes related to edge trigger latch for the ahci_xgene_driver.

[Tejun Heo]

On Wed, Feb 10, 2016 at 10:59:31AM -0800, Suman Tripathi wrote:
> Hi Tejun,
> 
> On Wed, Feb 10, 2016 at 8:25 AM, Tejun Heo <tj@kernel.org> wrote:
> > On Sat, Feb 06, 2016 at 11:25:21AM +0530, suman Tripathi wrote:
> >> From: Suman Tripathi <stripathi@apm.com>
> >>
> >> This patch set implements a workaround for an errate in the APM
> >> X-Gene SATA host controller with edge interrupt. The HOST_IRQ_STAT
> >> misses the edge interrupt from the PORT_IRQ_STAT when clearing the
> >> HOST_IRQ_STAT and reporting the PORT_IRQ_STAT happens in same clock
> >> cycle. It also implements the capability to override generic interrupt
> >> handler.
> >
> > Applied 1-3 to libata/for-4.6 with minor updates.
> 
> will this patchset  go to 4.5 ?

I applied them to for-4.6 but it can go through for-4.5-fixes if
necessary.  Is it necessary?

Thanks.

-- 
tejun

Re: [PATCH v4 0/3] ata: Fixes related to edge trigger latch for the ahci_xgene_driver.

[Suman Tripathi]

Hi Tejun,

On Wed, Feb 10, 2016 at 11:05 AM, Tejun Heo <tj@kernel.org> wrote:
> On Wed, Feb 10, 2016 at 10:59:31AM -0800, Suman Tripathi wrote:
>> Hi Tejun,
>>
>> On Wed, Feb 10, 2016 at 8:25 AM, Tejun Heo <tj@kernel.org> wrote:
>> > On Sat, Feb 06, 2016 at 11:25:21AM +0530, suman Tripathi wrote:
>> >> From: Suman Tripathi <stripathi@apm.com>
>> >>
>> >> This patch set implements a workaround for an errate in the APM
>> >> X-Gene SATA host controller with edge interrupt. The HOST_IRQ_STAT
>> >> misses the edge interrupt from the PORT_IRQ_STAT when clearing the
>> >> HOST_IRQ_STAT and reporting the PORT_IRQ_STAT happens in same clock
>> >> cycle. It also implements the capability to override generic interrupt
>> >> handler.
>> >
>> > Applied 1-3 to libata/for-4.6 with minor updates.
>>
>> will this patchset  go to 4.5 ?
>
> I applied them to for-4.6 but it can go through for-4.5-fixes if
> necessary.  Is it necessary?

It would be nice because our vendors are using 4.5.

>
> Thanks.
>
> --
> tejun



-- 
Thanks,
with regards,
Suman Tripathi

Re: [PATCH v4 0/3] ata: Fixes related to edge trigger latch for the ahci_xgene_driver.

[Tejun Heo]

On Wed, Feb 10, 2016 at 2:08 PM, Suman Tripathi <stripathi-qTEPVZfXA3Y@public.gmane.org> wrote:
>> I applied them to for-4.6 but it can go through for-4.5-fixes if
>> necessary.  Is it necessary?
>
> It would be nice because our vendors are using 4.5.

Sure thing.  Moving to for-4.5-fixes.

Thanks.

-- 
tejun
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Re: [PATCH v4 0/3] ata: Fixes related to edge trigger latch for the ahci_xgene_driver.

[Suman Tripathi]

On Wed, Feb 10, 2016 at 11:24 AM, Tejun Heo <tj@kernel.org> wrote:
> On Wed, Feb 10, 2016 at 2:08 PM, Suman Tripathi <stripathi@apm.com> wrote:
>>> I applied them to for-4.6 but it can go through for-4.5-fixes if
>>> necessary.  Is it necessary?
>>
>> It would be nice because our vendors are using 4.5.
>
> Sure thing.  Moving to for-4.5-fixes.
>
> Thanks.

Thanks a lot Tejun !!
>
> --
> tejun



-- 
Thanks,
with regards,
Suman Tripathi