From: Rob Herring <robh@kernel.org>
To: Andre Przywara <andre.przywara@arm.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>,
Chen-Yu Tsai <wens@csie.org>,
linux-sunxi@googlegroups.com, Arnd Bergmann <arnd@arndb.de>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Linus Walleij <linus.walleij@linaro.org>,
Vishnu Patekar <vishnupatekar0510@gmail.com>,
linux-gpio@vger.kernel.org, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
devicetree@vger.kernel.org
Subject: Re: [PATCH v2 2/8] drivers: pinctrl: add driver for Allwinner A64 SoC
Date: Thu, 18 Feb 2016 08:35:43 -0600 [thread overview]
Message-ID: <20160218143543.GC9654@rob-hp-laptop> (raw)
In-Reply-To: <1455709440-8668-3-git-send-email-andre.przywara@arm.com>
On Wed, Feb 17, 2016 at 11:43:54AM +0000, Andre Przywara wrote:
> Based on the Allwinner A64 user manual and on the previous sunxi
> pinctrl drivers this introduces the pin multiplex assignments for
> the ARMv8 Allwinner A64 SoC.
> Port A is apparently used for the fixed function DRAM controller, so
> the ports start at B here (the manual mentions "n from 1 to 7", so
> not starting at 0).
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 +
Acked-by: Rob Herring <robh@kernel.org>
> arch/arm64/Kconfig.platforms | 1 +
> drivers/pinctrl/sunxi/Kconfig | 4 +
> drivers/pinctrl/sunxi/Makefile | 1 +
> drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 606 +++++++++++++++++++++
> 5 files changed, 613 insertions(+)
> create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
next prev parent reply other threads:[~2016-02-18 14:35 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1455709440-8668-1-git-send-email-andre.przywara@arm.com>
[not found] ` <1455709440-8668-1-git-send-email-andre.przywara-5wv7dgnIgG8@public.gmane.org>
2016-02-17 11:43 ` [PATCH v2 2/8] drivers: pinctrl: add driver for Allwinner A64 SoC Andre Przywara
2016-02-18 14:35 ` Rob Herring [this message]
[not found] ` <1455709440-8668-3-git-send-email-andre.przywara-5wv7dgnIgG8@public.gmane.org>
2016-02-18 17:28 ` Chen-Yu Tsai
2016-02-17 11:43 ` [PATCH v2 3/8] DT: clk: sunxi: add binding doc for the multi-bus-gates clock Andre Przywara
[not found] ` <1455709440-8668-4-git-send-email-andre.przywara-5wv7dgnIgG8@public.gmane.org>
2016-02-18 14:35 ` Rob Herring
2016-02-17 11:43 ` [PATCH v2 4/8] clk: sunxi: add generic multi-parent bus clock gates driver Andre Przywara
2016-02-17 11:43 ` [PATCH v2 5/8] arm64: dts: add Allwinner A64 SoC .dtsi Andre Przywara
[not found] ` <1455709440-8668-6-git-send-email-andre.przywara-5wv7dgnIgG8@public.gmane.org>
2016-02-17 15:21 ` Andre Przywara
2016-02-18 14:36 ` Rob Herring
2016-02-17 11:43 ` [PATCH v2 6/8] of: add vendor prefix for Pine64 Andre Przywara
2016-02-18 14:36 ` Rob Herring
2016-02-17 11:43 ` [PATCH v2 7/8] arm64: dts: add Pine64 support Andre Przywara
2016-02-17 15:22 ` Andre Przywara
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