From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH 5/6] dt-bindings: add documentation of rk3399 clock controller Date: Thu, 18 Feb 2016 08:36:48 -0600 Message-ID: <20160218143648.GL9654@rob-hp-laptop> References: <1455673992-16469-1-git-send-email-jay.xu@rock-chips.com> <1455674089-16567-1-git-send-email-jay.xu@rock-chips.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1455674089-16567-1-git-send-email-jay.xu@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org To: "jianqun.xu" Cc: heiko@sntech.de, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, jwerner@chromium.org, broonie@kernel.org, catalin.marinas@arm.com, will.deacon@arm.com, sboyd@codeaurora.org, linus.walleij@linaro.org, sjoerd.simons@collabora.co.uk, huangtao@rock-chips.com, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Xing Zheng List-Id: devicetree@vger.kernel.org On Wed, Feb 17, 2016 at 09:54:49AM +0800, jianqun.xu wrote: > From: Xing Zheng > > Add the devicetree binding for the cru on the rk3399 which quite > similar structured as previous clock controllers. > > Signed-off-by: Xing Zheng > --- > .../bindings/clock/rockchip,rk3399-cru.txt | 82 ++++++++++++++++++++++ > 1 file changed, 82 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt > > diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt > new file mode 100644 > index 0000000..07bcc6e > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt > @@ -0,0 +1,82 @@ > +* Rockchip RK3399 Clock and Reset Unit [...] > +Example: General Register Files > + > + pmugrf: syscon@ff320000 { > + compatible = "rockchip,rk3399-pmugrf", "syscon"; Is this documented? > + reg = <0x0 0xff320000 0x0 0x1000>; > + }; > + > + grf: syscon@ff770000 { > + compatible = "rockchip,rk3399-grf", "syscon"; ditto. > + reg = <0x0 0xff770000 0x0 0x10000>; > + }; > + > +Example: Clock controller node: > + > + pmucru: pmu-clock-controller@ff750000 { > + compatible = "rockchip,rk3399-pmucru"; > + reg = <0x0 0xff750000 0x0 0x1000>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + }; > + > + cru: clock-controller@ff760000 { > + compatible = "rockchip,rk3399-cru"; > + reg = <0x0 0xff760000 0x0 0x1000>; > + rockchip,grf = <&grf>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + }; > + > +Example: UART controller node that consumes the clock generated by the clock > + controller: > + > + uart0: serial@ff1a0000 { > + compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart"; > + reg = <0x0 0xff180000 0x0 0x100>; > + clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; > + clock-names = "baudclk", "apb_pclk"; > + interrupts = ; > + reg-shift = <2>; > + reg-io-width = <4>; > + }; > -- > 1.9.1 > >