From: Rob Herring <robh@kernel.org>
To: Joachim Eastwood <manabian@gmail.com>
Cc: mturquette@baylibre.com, sboyd@codeaurora.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 2/2] doc: dt: add documentation for lpc1850-creg-clk driver
Date: Tue, 23 Feb 2016 12:08:44 -0600 [thread overview]
Message-ID: <20160223180844.GA11770@rob-hp-laptop> (raw)
In-Reply-To: <1455994417-4471-3-git-send-email-manabian@gmail.com>
On Sat, Feb 20, 2016 at 07:53:37PM +0100, Joachim Eastwood wrote:
> Add DT binding documentation for lpc1850-creg-clk driver.
>
> Signed-off-by: Joachim Eastwood <manabian@gmail.com>
> ---
> .../devicetree/bindings/clock/lpc1850-creg-clk.txt | 52 ++++++++++++++++++++++
> 1 file changed, 52 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/lpc1850-creg-clk.txt
>
> diff --git a/Documentation/devicetree/bindings/clock/lpc1850-creg-clk.txt b/Documentation/devicetree/bindings/clock/lpc1850-creg-clk.txt
> new file mode 100644
> index 000000000000..0c83d373b766
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/lpc1850-creg-clk.txt
> @@ -0,0 +1,52 @@
> +* NXP LPC1850 CREG clocks
> +
> +The NXP LPC18xx/43xx CREG (Configuration Registers) block contains
> +control registers for two low speed clocks. One of the clocks is a
> +32 kHz oscillator driver with power up/down and clock gating. Next
> +is a fixed divider that creates a 1 kHz clock from the 32 kHz osc.
> +
> +These clocks are used by the RTC and the Event Router peripherials.
> +The 32 kHz can also be routed to other peripherials to enable low
> +power modes.
> +
> +This binding uses the common clock binding:
> + Documentation/devicetree/bindings/clock/clock-bindings.txt
> +
> +Required properties:
> +- compatible:
> + Should be "nxp,lpc1850-creg-clk"
> +- #clock-cells:
> + Shall have value <1>.
> +- clocks:
> + Shall contain a phandle to the fix 32 kHz crystall.
> +
> +The creg-clk node must be a child of the creg syscon node.
> +
> +The following clocks are available from the clock node.
> +
> +Clock ID Name
> + 0 1 kHz clock
> + 1 32 kHz Oscillator
> +
> +Example:
> +soc {
> + creg: syscon@40043000 {
> + compatible = "nxp,lpc1850-creg", "syscon", "simple-mfd";
> + reg = <0x40043000 0x1000>;
> +
> + creg_clk: clock-controller@004 {
What is 4? A unit address should have a corresponding reg prop. and no
leading zeros.
> + compatible = "nxp,lpc1850-creg-clk";
> + clocks = <&xtal32>;
> + #clock-cells = <1>;
> + };
next prev parent reply other threads:[~2016-02-23 18:08 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-20 18:53 [PATCH v2 0/2] CREG clk driver for NXP LPC18xx family Joachim Eastwood
2016-02-20 18:53 ` [PATCH v2 1/2] clk: add lpc18xx creg clk driver Joachim Eastwood
[not found] ` <1455994417-4471-2-git-send-email-manabian-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-02-22 21:55 ` Stephen Boyd
2016-02-24 21:05 ` Michael Turquette
2016-02-20 18:53 ` [PATCH v2 2/2] doc: dt: add documentation for lpc1850-creg-clk driver Joachim Eastwood
2016-02-23 18:08 ` Rob Herring [this message]
2016-02-23 18:53 ` Joachim Eastwood
2016-02-23 21:58 ` Rob Herring
2016-02-23 22:12 ` Joachim Eastwood
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