From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH v3 04/10] drivers: pinctrl: add driver for Allwinner A64 SoC Date: Thu, 25 Feb 2016 10:49:44 -0800 Message-ID: <20160225184944.GI4736@lukather> References: <1456165255-31013-1-git-send-email-andre.przywara@arm.com> <1456165255-31013-5-git-send-email-andre.przywara@arm.com> Reply-To: maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="boAH8PqvUi1v1f55" Return-path: Content-Disposition: inline In-Reply-To: <1456165255-31013-5-git-send-email-andre.przywara-5wv7dgnIgG8@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Linus Walleij , Andre Przywara Cc: Chen-Yu Tsai , linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, Arnd Bergmann , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Vishnu Patekar , linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org --boAH8PqvUi1v1f55 Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Hi, On Mon, Feb 22, 2016 at 06:20:49PM +0000, Andre Przywara wrote: > Based on the Allwinner A64 user manual and on the previous sunxi > pinctrl drivers this introduces the pin multiplex assignments for > the ARMv8 Allwinner A64 SoC. > Port A is apparently used for the fixed function DRAM controller, so > the ports start at B here (the manual mentions "n from 1 to 7", so > not starting at 0). > > Signed-off-by: Andre Przywara > Acked-by: Rob Herring Acked-by: Maxime Ripard Linus, could you merge this patch for 4.6? Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --boAH8PqvUi1v1f55--