From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH 2/5] Documentation: dt: socfpga: Add Altera Arri10 L2 cache binding Date: Fri, 4 Mar 2016 22:26:13 -0600 Message-ID: <20160305042613.GI13525@rob-hp-laptop> References: <1456850301-22066-1-git-send-email-tthayer@opensource.altera.com> <1456850301-22066-2-git-send-email-tthayer@opensource.altera.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1456850301-22066-2-git-send-email-tthayer@opensource.altera.com> Sender: linux-doc-owner@vger.kernel.org To: tthayer@opensource.altera.com Cc: bp@alien8.de, dougthompson@xmission.com, m.chehab@samsung.com, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, dinguyen@opensource.altera.com, grant.likely@linaro.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, tthayer.linux@gmail.com List-Id: devicetree@vger.kernel.org On Tue, Mar 01, 2016 at 10:38:18AM -0600, tthayer@opensource.altera.com wrote: > From: Thor Thayer > > Add the device tree binding string needed to support the Altera L2 > cache on the Arria10 chip. > > Signed-off-by: Thor Thayer > --- > .../bindings/arm/altera/socfpga-eccmgr.txt | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) Acked-by: Rob Herring