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From: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Carlo Caione <carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
Cc: linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	b.galvani-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-meson-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-6IF/jdPJHihWk0Htik3J/w@public.gmane.org,
	arnd-r2nGTMty4D4@public.gmane.org,
	Carlo Caione <carlo-6IF/jdPJHihWk0Htik3J/w@public.gmane.org>
Subject: Re: [PATCH 4/4] documentation: Fix pinctrl documentation for Meson8 / Meson8b
Date: Fri, 4 Mar 2016 22:26:46 -0600	[thread overview]
Message-ID: <20160305042646.GL13525@rob-hp-laptop> (raw)
In-Reply-To: <1456869876-19320-5-git-send-email-carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>

On Tue, Mar 01, 2016 at 11:04:36PM +0100, Carlo Caione wrote:
> From: Carlo Caione <carlo-6IF/jdPJHihWk0Htik3J/w@public.gmane.org>
> 
> Fix pin controller documentation with the new compatibles.

What was wrong with it? (answer in the commit msg)

> 
> Signed-off-by: Carlo Caione <carlo-6IF/jdPJHihWk0Htik3J/w@public.gmane.org>
> ---
>  .../devicetree/bindings/pinctrl/meson,pinctrl.txt  | 36 +++-------------------
>  1 file changed, 5 insertions(+), 31 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
> index 3f6a524..51a8ebb 100644
> --- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
> @@ -1,13 +1,14 @@
>  == Amlogic Meson pinmux controller ==
>  
>  Required properties for the root node:
> - - compatible: "amlogic,meson8-pinctrl" or "amlogic,meson8b-pinctrl"
> + - compatible: "amlogic,meson8-cbus-pinctrl", "amlogic,meson8b-cbus-pinctrl",
> +   "amlogic,meson8-aobus-pinctrl" or "amlogic,meson8b-aobus-pinctrl"

Reformat with 1 per line (assuming each are mutually exclusive).

>   - reg: address and size of registers controlling irq functionality
>  
>  === GPIO sub-nodes ===
>  
> -The 2 power domains of the controller (regular and always-on) are
> -represented as sub-nodes and each of them acts as a GPIO controller.
> +Each power domain of the controller (regular and always-on) is
> +represented as a sub-node and it acts as a GPIO controller.
>  
>  Required properties for sub-nodes are:
>   - reg: should contain address and size for mux, pull-enable, pull and
> @@ -18,10 +19,6 @@ Required properties for sub-nodes are:
>   - gpio-controller: identifies the node as a gpio controller
>   - #gpio-cells: must be 2
>  
> -Valid sub-node names are:
> - - "banks" for the regular domain
> - - "ao-bank" for the always-on domain
> -

Why are these being removed?

>  === Other sub-nodes ===
>  
>  Child nodes without the "gpio-controller" represent some desired
> @@ -45,7 +42,7 @@ pinctrl-bindings.txt
>  === Example ===
>  
>  	pinctrl: pinctrl@c1109880 {
> -		compatible = "amlogic,meson8-pinctrl";
> +		compatible = "amlogic,meson8-cbus-pinctrl";
>  		reg = <0xc1109880 0x10>;
>  		#address-cells = <1>;
>  		#size-cells = <1>;
> @@ -61,15 +58,6 @@ pinctrl-bindings.txt
>  			#gpio-cells = <2>;
>                 };
>  
> -		gpio_ao: ao-bank@c1108030 {
> -			reg = <0xc8100014 0x4>,
> -			      <0xc810002c 0x4>,
> -			      <0xc8100024 0x8>;
> -			reg-names = "mux", "pull", "gpio";
> -			gpio-controller;
> -			#gpio-cells = <2>;
> -		};
> -
>  		nand {
>  			mux {
>  				groups = "nand_io", "nand_io_ce0", "nand_io_ce1",
> @@ -79,18 +67,4 @@ pinctrl-bindings.txt
>  				function = "nand";
>  			};
>  		};
> -
> -		uart_ao_a {
> -			mux {
> -				groups = "uart_tx_ao_a", "uart_rx_ao_a",
> -					 "uart_cts_ao_a", "uart_rts_ao_a";
> -				function = "uart_ao";
> -			};
> -
> -			conf {
> -				pins = "GPIOAO_0", "GPIOAO_1",
> -				       "GPIOAO_2", "GPIOAO_3";
> -				bias-disable;
> -			};
> -		};
>  	};
> -- 
> 1.9.1
> 
--
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  parent reply	other threads:[~2016-03-05  4:26 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-01 22:04 [PATCH 0/4] Refactor pinctrl driver for aobus / cbus Carlo Caione
     [not found] ` <1456869876-19320-1-git-send-email-carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
2016-03-01 22:04   ` [PATCH 1/4] pinctrl: amlogic: Separate some pin functions for Meson8 / Meson8b Carlo Caione
     [not found]     ` <1456869876-19320-2-git-send-email-carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
2016-03-09  5:59       ` Linus Walleij
2016-03-01 22:04   ` [PATCH 2/4] pinctrl: amlogic: Make driver independent from two-domain configuration Carlo Caione
     [not found]     ` <1456869876-19320-3-git-send-email-carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
2016-03-09  6:01       ` Linus Walleij
2016-03-17  3:31       ` Kevin Hilman
     [not found]         ` <CAOi56cWN-iPVh6Ace-SXUFoX4POnSyT0OmG8gyqivNpQTo9u4A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-03-17  4:28           ` Kevin Hilman
2016-03-17  7:09           ` Carlo Caione
     [not found]             ` <CAOQ7t2Ykgej4uyDLUvuSZyjiJwK1TF4RGYJQhXWubk69d1xA_Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-03-17 15:35               ` Kevin Hilman
     [not found]                 ` <7h7fh1t8vu.fsf-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
2016-03-17 18:15                   ` Carlo Caione
     [not found]                     ` <CAOQ7t2YjS5nAb3xxpdH-H11+2Y8WeCkxdKJE9yUKzkbVYMYfEw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-03-18 16:14                       ` Kevin Hilman
2016-03-01 22:04   ` [PATCH 3/4] ARM: dts: amlogic: Split pinctrl device for Meson8 / Meson8b Carlo Caione
     [not found]     ` <1456869876-19320-4-git-send-email-carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
2016-03-18 17:36       ` Andreas Färber
2016-03-01 22:04   ` [PATCH 4/4] documentation: Fix pinctrl documentation " Carlo Caione
     [not found]     ` <1456869876-19320-5-git-send-email-carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
2016-03-05  4:26       ` Rob Herring [this message]
2016-03-07  9:01         ` Carlo Caione

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