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From: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Jiancheng Xue <xuejiancheng-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
Cc: Brian Norris
	<computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	pawel.moll-5wv7dgnIgG8@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org,
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	jteki-oRp2ZoJdM/RWk0Htik3J/w@public.gmane.org,
	ezequiel-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org,
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	linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	yanhaifeng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
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	xuejiancheng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
	Binquan Peng
	<pengbinquan-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
Subject: Re: [RESEND PATCH v7] mtd: spi-nor: add hisilicon spi-nor flash controller driver
Date: Tue, 8 Mar 2016 10:46:28 +0100	[thread overview]
Message-ID: <20160308104628.6224bde2@bbrezillon> (raw)
In-Reply-To: <56DE9A79.30704-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>

On Tue, 8 Mar 2016 17:25:13 +0800
Jiancheng Xue <xuejiancheng-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> wrote:

> Hi Brian,
>    Thank you very much for your comments.
> 
> On 2016/3/8 6:52, Brian Norris wrote:
> [...]
> >>
> >> diff --git a/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt b/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
> >> new file mode 100644
> >> index 0000000..7407147
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
> > 
> > This is not a SPI controller (or is it? it looks like a SPI NOR
> > controller that doesn't do generic SPI), so it shouldn't go in the spi/
> > directory.
> > 
> OK. I'll move this file into Documentation/devicetree/bindings/mtd.
> 
> >> @@ -0,0 +1,25 @@
> >> +HiSilicon SPI-NOR Flash Controller
> >> +
> >> +Required properties:
> >> +- compatible : Should be "hisilicon,hisi-sfc" and one of the following strings:
> >> +		"hisilicon,hi3519-sfc"
> >> +- address-cells : number of cells required to define a chip select
> >> +        address on the SPI bus. Should be set to 1. See spi-bus.txt.
> > 
> > This is not exactly a typical SPI bus, though I suppose some of that
> > documentation could apply...
> > 
> 
> OK. I'll modify the description.
> 
> [...]
> >> +static int hisi_spi_nor_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf,
> >> +		int len)
> >> +{
> >> +	struct hifmc_priv *priv = nor->priv;
> >> +	struct hifmc_host *host = priv->host;
> >> +	int ret;
> >> +
> >> +	ret = hisi_spi_nor_send_cmd(nor, opcode, len);
> >> +	if (ret)
> >> +		return ret;
> >> +
> >> +	memcpy(buf, host->iobase, len);
> > 
> > sparse doesn't like any of these memcpy()'s, since that's __iomem. Are
> > you sure you want a regular memcpy here, and elsewhere?
> > 
> It's not a must to use memcpy though host->iobase represents a segment of inner memory
> which stores data from flash device byte by byte.  I will give up using memcpy here and
> hisi_spi_nor_write_reg() in next version. Thank you!

Or you can use memcpy_fromio(), which should give you better perfs than
using readX() accessors in a loop.


-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
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  parent reply	other threads:[~2016-03-08  9:46 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-26  8:11 [RESEND PATCH v7] mtd: spi-nor: add hisilicon spi-nor flash controller driver Jiancheng Xue
     [not found] ` <1456474316-24473-1-git-send-email-xuejiancheng-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2016-03-05  0:35   ` Ezequiel Garcia
2016-03-07 22:52 ` Brian Norris
2016-03-08  9:25   ` Jiancheng Xue
     [not found]     ` <56DE9A79.30704-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2016-03-08  9:46       ` Boris Brezillon [this message]
2016-03-09  3:35         ` Jiancheng Xue
2016-03-09 18:50       ` Brian Norris

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