From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH] clk: sunxi: Add CSI (camera's Sensors Interface) module clock driver for sun[457]i Date: Sat, 19 Mar 2016 18:59:05 -0500 Message-ID: <20160319235905.GA16539@rob-hp-laptop> References: <1458204222-31149-1-git-send-email-yassinjaffer@gmail.com> <1458204222-31149-2-git-send-email-yassinjaffer@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1458204222-31149-2-git-send-email-yassinjaffer@gmail.com> Sender: linux-clk-owner@vger.kernel.org To: yassinjaffer@gmail.com Cc: dev@linux-sunxi.org, Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Maxime Ripard , Chen-Yu Tsai , Emilio =?iso-8859-1?Q?L=F3pez?= , Michael Turquette , Stephen Boyd , Hans de Goede , Reinder de Haan , Jens Kuske , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/Allwinner sunXi SoC support" , open list , "open list:COMMON CLK FRAMEWORK" List-Id: devicetree@vger.kernel.org On Thu, Mar 17, 2016 at 07:43:42PM +1100, yassinjaffer@gmail.com wrote: > From: Yassin Jaffer > > This patch adds a composite clock type consisting of > a clock gate, mux, configurable dividers, and a reset control. > > Signed-off-by: Yassin Jaffer > --- > Documentation/devicetree/bindings/clock/sunxi.txt | 1 + I wish someone would just add all the sunxi clocks in one pass instead of one by one. Acked-by: Rob Herring > drivers/clk/sunxi/Makefile | 1 + > drivers/clk/sunxi/clk-a10-csi.c | 188 ++++++++++++++++++++++ > 3 files changed, 190 insertions(+) > create mode 100644 drivers/clk/sunxi/clk-a10-csi.c