From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH v3 08/19] ARM: sun5i: Add DRAM gates Date: Tue, 29 Mar 2016 12:07:56 +0200 Message-ID: <20160329100755.GK30977@lukather> References: <1458751122-23976-1-git-send-email-maxime.ripard@free-electrons.com> <1458751122-23976-9-git-send-email-maxime.ripard@free-electrons.com> Reply-To: maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="06oJaeO7B872Jacb" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Chen-Yu Tsai Cc: Mike Turquette , Stephen Boyd , David Airlie , Thierry Reding , Rob Herring , Daniel Vetter , devicetree , linux-arm-kernel , linux-kernel , dri-devel , linux-sunxi , Laurent Pinchart , Hans de Goede , Alexander Kaplan , Boris Brezillon , Thomas Petazzoni , Rob Clark List-Id: devicetree@vger.kernel.org --06oJaeO7B872Jacb Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline On Thu, Mar 24, 2016 at 12:31:13PM +0800, Chen-Yu Tsai wrote: > On Thu, Mar 24, 2016 at 12:38 AM, Maxime Ripard > wrote: > > The DRAM gates control whether the image / display devices on the SoC have > > access to the DRAM clock or not. > > > > Enable it. > > > > Signed-off-by: Maxime Ripard > > Acked-by: Chen-Yu Tsai > > I assume you'll add another version for A10s, or move the whole thing > to sun5i.dtsi later? Indeed. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --06oJaeO7B872Jacb--