From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH v2 4/8] drm/fsl-dcu: add extra clock for pixel clock Date: Thu, 31 Mar 2016 09:42:09 -0500 Message-ID: <20160331144209.GA28867@rob-hp-laptop> References: <1459216802-32094-1-git-send-email-stefan@agner.ch> <1459216802-32094-5-git-send-email-stefan@agner.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <1459216802-32094-5-git-send-email-stefan@agner.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Stefan Agner Cc: meng.yi@nxp.com, pawel.moll@arm.com, alison.wang@freescale.com, daniel.vetter@ffwll.ch, mturquette@baylibre.com, ijc+devicetree@hellion.org.uk, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, kernel@pengutronix.de, galak@codeaurora.org, mark.rutland@arm.com, shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org, alexander.stein@systec-electronic.com List-Id: devicetree@vger.kernel.org T24gTW9uLCBNYXIgMjgsIDIwMTYgYXQgMDY6NTk6NThQTSAtMDcwMCwgU3RlZmFuIEFnbmVyIHdy b3RlOgo+IFRoZSBWeWJyaWQgRENVIHZhcmlhbnQgaGFzIHR3byBpbmRlcGVuZGVudCBjbG9jayBp bnB1dHMsIG9uZQo+IGZvciB0aGUgcmVnaXN0ZXJzIChJUEcgYnVzIGNsb2NrKSBhbmQgb25lIGZv ciB0aGUgcGl4ZWwgY2xvY2suCj4gU3VwcG9ydCB0aGlzIGRpc3RpbmN0aW9uIGluIHRoZSBEQ1Ug RFJNIGRyaXZlciB3aGlsZSBzdGF5aW5nCj4gYmFja3dhcmQgY29tcGF0aWJsZSB3aXRoIGRldmlj ZXMgcHJvdmlkaW5nIG9ubHkgYSBzaW5nbGUgY2xvY2sKPiAoZS5nLiBMUzEwMjFhIFNvQydzKS4K CkknZCBzdXNwZWN0IHRoYXQgYm90aCBoYXZlIDIgY2xvY2tzLCBqdXN0IHRoZSBMUzEwMjFhIGVp dGhlciBkaWRuJ3QgCm1vZGVsIHRoZSBJUEcgY2xvY2sgb3IgY29ubmVjdHMgYm90aCB0byB0aGUg c2FtZSBzb3VyY2UuIFRoZSBkcml2ZXIgCnNob3VsZCBzdXBwb3J0IGJvdGgsIGJ1dCBhbGwgdGhl IGR0cydzIHNob3VsZCBiZSB1cGRhdGVkIHRvIGhhdmUgMiAKY2xvY2tzLgoKPiAKPiBTaWduZWQt b2ZmLWJ5OiBTdGVmYW4gQWduZXIgPHN0ZWZhbkBhZ25lci5jaD4KPiAtLS0KPiAgRG9jdW1lbnRh dGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL2Rpc3BsYXkvZnNsLGRjdS50eHQgfCAgNCArKysrCj4g IGRyaXZlcnMvZ3B1L2RybS9mc2wtZGN1L2ZzbF9kY3VfZHJtX2NydGMuYyAgICAgICAgICAgIHwg IDIgKy0KPiAgZHJpdmVycy9ncHUvZHJtL2ZzbC1kY3UvZnNsX2RjdV9kcm1fZHJ2LmMgICAgICAg ICAgICAgfCAxNiArKysrKysrKysrKysrKystCj4gIGRyaXZlcnMvZ3B1L2RybS9mc2wtZGN1L2Zz bF9kY3VfZHJtX2Rydi5oICAgICAgICAgICAgIHwgIDEgKwo+ICA0IGZpbGVzIGNoYW5nZWQsIDIx IGluc2VydGlvbnMoKyksIDIgZGVsZXRpb25zKC0pCj4gCj4gZGlmZiAtLWdpdCBhL0RvY3VtZW50 YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9kaXNwbGF5L2ZzbCxkY3UudHh0IGIvRG9jdW1lbnRh dGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL2Rpc3BsYXkvZnNsLGRjdS50eHQKPiBpbmRleCBlYmYx YmU5Li5mMjk5ZTFlIDEwMDY0NAo+IC0tLSBhL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5k aW5ncy9kaXNwbGF5L2ZzbCxkY3UudHh0Cj4gKysrIGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVl L2JpbmRpbmdzL2Rpc3BsYXkvZnNsLGRjdS50eHQKPiBAQCAtMTEsNiArMTEsMTAgQEAgUmVxdWly ZWQgcHJvcGVydGllczoKPiAgLSBiaWctZW5kaWFuCQlCb29sZWFuIHByb3BlcnR5LCBMUzEwMjFB IERDVSByZWdpc3RlcnMgYXJlIGJpZy1lbmRpYW4uCj4gIC0gZnNsLHBhbmVsOgkJVGhlIHBoYW5k bGUgdG8gcGFuZWwgbm9kZS4KPiAgCj4gK09wdGlvbmFsIHByb3BlcnRpZXM6Cj4gKy0gY2xvY2tz OgkJU2Vjb25kIGhhbmRsZSBmb3IgcGl4ZWwgY2xvY2suCj4gKy0gY2xvY2stbmFtZXM6CQlTZWNv bmQgbmFtZSAicGl4IiBmb3IgcGl4ZWwgY2xvY2suCgpEb2N1bWVudCB0aGVzZSBpbiBvbmUgcGxh Y2UgYW5kIGp1c3QgYWRkIGEgbm90ZSB0aGF0IExTMTAyMWEgb25seSBoYXMgMSAKY2xvY2suCgo+ ICsKPiAgRXhhbXBsZXM6Cj4gIGRjdTogZGN1QDJjZTAwMDAgewo+ICAJY29tcGF0aWJsZSA9ICJm c2wsbHMxMDIxYS1kY3UiOwo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vZnNsLWRjdS9m c2xfZGN1X2RybV9jcnRjLmMKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0 b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJp LWRldmVsCg==