From: Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Cc: Mike Turquette
<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
David Airlie <airlied-cv59FeDIM0c@public.gmane.org>,
Thierry Reding
<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
Daniel Vetter <daniel-/w4YWyX8dFk@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
Laurent Pinchart
<laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>,
Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>,
Alexander Kaplan <alex-MflLfwwFzuz+yO7R74ARew@public.gmane.org>,
Boris Brezillon
<boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Thomas Petazzoni
<thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Rob Clark <robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Subject: Re: [PATCH v3 03/19] clk: sunxi: Add PLL3 clock
Date: Fri, 15 Apr 2016 15:34:41 -0700 [thread overview]
Message-ID: <20160415223441.GT14441@codeaurora.org> (raw)
In-Reply-To: <1458751122-23976-4-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
On 03/23, Maxime Ripard wrote:
> The A10 SoCs and relatives have a PLL controller to drive the PLL3 and
> PLL7, clocked from a 3MHz oscillator, that drives the display related
> clocks (GPU, display engine, TCON, etc.)
>
> Add a driver for it.
>
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Acked-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
> Signed-off-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> ---
Acked-by: Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2016-04-15 22:34 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-23 16:38 [PATCH v3 00/19] drm: Add Allwinner A10 display engine support Maxime Ripard
2016-03-23 16:38 ` [PATCH v3 03/19] clk: sunxi: Add PLL3 clock Maxime Ripard
[not found] ` <1458751122-23976-4-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2016-04-15 22:34 ` Stephen Boyd [this message]
[not found] ` <20160415223441.GT14441-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-04-19 9:18 ` Maxime Ripard
[not found] ` <1458751122-23976-1-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2016-03-23 16:38 ` [PATCH v3 01/19] clk: composite: Add unregister function Maxime Ripard
[not found] ` <1458751122-23976-2-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2016-04-10 9:16 ` Maxime Ripard
2016-04-15 22:28 ` Stephen Boyd
[not found] ` <20160415222856.GQ14441-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-04-19 9:52 ` Maxime Ripard
2016-04-21 22:16 ` Stephen Boyd
2016-03-23 16:38 ` [PATCH v3 02/19] clk: sunxi: Add display and TCON0 clocks driver Maxime Ripard
[not found] ` <1458751122-23976-3-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2016-04-15 22:34 ` Stephen Boyd
[not found] ` <20160415223410.GS14441-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-04-21 12:01 ` Maxime Ripard
2016-03-23 16:38 ` [PATCH v3 04/19] clk: sunxi: Add TCON channel1 clock Maxime Ripard
[not found] ` <1458751122-23976-5-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2016-04-15 22:39 ` Stephen Boyd
2016-04-21 16:56 ` Maxime Ripard
2016-03-23 16:38 ` [PATCH v3 05/19] dt-bindings: clk: sun5i: add DRAM gates compatible Maxime Ripard
[not found] ` <1458751122-23976-6-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2016-04-15 22:29 ` Stephen Boyd
[not found] ` <20160415222911.GR14441-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-04-19 9:16 ` Maxime Ripard
2016-03-23 16:38 ` [PATCH v3 06/19] ARM: sun5i: dt: Add pll3 and pll7 clocks Maxime Ripard
[not found] ` <1458751122-23976-7-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2016-04-19 9:58 ` Maxime Ripard
2016-03-23 16:38 ` [PATCH v3 07/19] ARM: sun5i: a13: Add display and TCON clocks Maxime Ripard
2016-03-23 16:38 ` [PATCH v3 08/19] ARM: sun5i: Add DRAM gates Maxime Ripard
[not found] ` <1458751122-23976-9-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2016-03-24 4:31 ` Chen-Yu Tsai
[not found] ` <CAGb2v66AV8FT7VLs-WV=QD-w-zYrOqgE--Gubq=+hnEUaqUH6g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-03-29 10:07 ` Maxime Ripard
2016-04-19 10:02 ` Maxime Ripard
2016-03-23 16:38 ` [PATCH v3 09/19] ARM: sun5i: Add TV encoder gate to the DTSI Maxime Ripard
2016-04-19 9:58 ` Maxime Ripard
2016-03-23 16:38 ` [PATCH v3 10/19] drm: fb: Add seq_file definition Maxime Ripard
2016-03-23 16:38 ` [PATCH v3 11/19] drm/panel: simple: Add timings for the Olimex LCD-OLinuXino-4.3TS Maxime Ripard
2016-04-15 15:01 ` Thierry Reding
2016-03-23 16:38 ` [PATCH v3 12/19] drm: Add Allwinner A10 Display Engine support Maxime Ripard
2016-03-23 16:38 ` [PATCH v3 13/19] drm: sun4i: Add DT bindings documentation Maxime Ripard
2016-03-25 14:11 ` Rob Herring
2016-03-29 10:33 ` Maxime Ripard
2016-03-29 18:50 ` Rob Herring
2016-04-10 9:02 ` Maxime Ripard
2016-03-23 16:38 ` [PATCH v3 14/19] drm: sun4i: Add RGB output Maxime Ripard
2016-03-23 16:38 ` [PATCH v3 15/19] drm: sun4i: Add composite output Maxime Ripard
2016-03-23 16:38 ` [PATCH v3 16/19] drm: sun4i: tv: Add PAL output standard Maxime Ripard
2016-03-23 16:38 ` [PATCH v3 17/19] drm: sun4i: tv: Add NTSC " Maxime Ripard
2016-03-23 16:38 ` [PATCH v3 18/19] ARM: sun5i: r8: Add display blocks to the DTSI Maxime Ripard
2016-03-23 16:38 ` [PATCH v3 19/19] ARM: sun5i: chip: Enable the TV Encoder Maxime Ripard
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