From: Rob Herring <robh@kernel.org>
To: Archit Taneja <architt@codeaurora.org>
Cc: robdclark@gmail.com, linux-arm-msm@vger.kernel.org,
dri-devel@lists.freedesktop.org, heiko@sntech.de,
p.zabel@pengutronix.de, devicetree@vger.kernel.org
Subject: Re: [PATCH 9/9] dt-bindings: msm/dsi: Add assigned clocks bindings
Date: Wed, 4 May 2016 08:44:16 -0500 [thread overview]
Message-ID: <20160504134416.GA1235@rob-hp-laptop> (raw)
In-Reply-To: <1462273081-5814-10-git-send-email-architt@codeaurora.org>
On Tue, May 03, 2016 at 04:28:01PM +0530, Archit Taneja wrote:
> The PLL in the DSI PHY block generates 2 clock outputs (Byte and Pixel
> clocks) that are fed into the Multimedia Clock Controller (MMCC). The MMCC
> uses these as source clocks for some of its RCGs to generate clocks that
> finally feed to the DSI host controller.
>
> Use the assigned clocks DT bindings to set up the MMCC RCGs that feed to
> the DSI host. Use the DSI PHY provided clocks to set up the parents
> of these assigned clocks.
>
> Signed-off-by: Archit Taneja <architt@codeaurora.org>
> ---
> Documentation/devicetree/bindings/display/msm/dsi.txt | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt b/Documentation/devicetree/bindings/display/msm/dsi.txt
> index 0223f06..686f475 100644
> --- a/Documentation/devicetree/bindings/display/msm/dsi.txt
> +++ b/Documentation/devicetree/bindings/display/msm/dsi.txt
> @@ -22,6 +22,10 @@ Required properties:
> * "core_clk"
> For DSIv2, we need an additional clock:
> * "src_clk"
> +- assigned-clocks: Parents of "byte_clk" and "pixel_clk" for the given platform.
> + See [1] for more details.
> +- assigned-clock-parents: The Byte clock and Pixel clock PLL outputs provided
> + by a DSI PHY block.
> - vdd-supply: phandle to vdd regulator device node
> - vddio-supply: phandle to vdd-io regulator device node
> - vdda-supply: phandle to vdda regulator device node
> @@ -90,6 +94,8 @@ Required properties:
> * "dsi_pll"
> * "dsi_phy"
> * "dsi_phy_regulator"
> +- clock-cells: Must be 1. The DSI PHY block acts as a clock provider, creating
> + 2 clocks: A byte clock (index 0), and a pixel clock (index 1).
You can't really add new required properties unless they are for a new
compatible string.
Rob
next prev parent reply other threads:[~2016-05-04 13:44 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-03 10:57 [PATCH 0/9] drm/msm: Fix issues with DT bindings Archit Taneja
2016-05-03 10:57 ` [PATCH 1/9] drm/msm: Get mdss components via parsing ports Archit Taneja
2016-05-03 10:57 ` [PATCH 2/9] drm/msm: Drop the gpu binding Archit Taneja
2016-05-03 12:42 ` Rob Herring
2016-05-04 6:45 ` Archit Taneja
2016-05-03 10:57 ` [PATCH 3/9] drm/msm/mdp: mdp4: Update LCDC/LVDS port parsing Archit Taneja
2016-05-03 13:50 ` Philipp Zabel
2016-05-03 10:57 ` [PATCH 4/9] dt-bindings: msm/mdp: Remove connector and gpu bindings Archit Taneja
2016-05-04 13:38 ` Rob Herring
2016-05-04 17:49 ` Archit Taneja
2016-05-03 10:57 ` [PATCH 6/9] drm/msm/dsi: Modify port parsing Archit Taneja
2016-05-03 10:57 ` [PATCH 7/9] drm/msm/dsi: Use generic PHY bindings Archit Taneja
[not found] ` <1462273081-5814-1-git-send-email-architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-05-03 10:57 ` [PATCH 5/9] dt-bindings: msm/dsi: Some binding doc cleanups Archit Taneja
2016-05-03 14:05 ` Philipp Zabel
2016-05-04 8:11 ` Archit Taneja
2016-05-03 10:58 ` [PATCH 8/9] dt-bindings: msm/dsi: Modify port and PHY bindings Archit Taneja
2016-05-03 14:02 ` Philipp Zabel
2016-05-04 8:09 ` Archit Taneja
2016-05-03 10:58 ` [PATCH 9/9] dt-bindings: msm/dsi: Add assigned clocks bindings Archit Taneja
2016-05-04 13:44 ` Rob Herring [this message]
2016-05-04 18:04 ` Archit Taneja
[not found] ` <572A39B7.5020008-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-05-11 14:08 ` Rob Herring
2016-06-10 10:46 ` [PATCH v2 00/10] drm/msm: Fix issues with DT bindings Archit Taneja
2016-06-10 10:46 ` [PATCH v2 02/10] drm/msm/mdp4: Clean up some MDP4 clocks Archit Taneja
2016-06-10 10:46 ` [PATCH v2 04/10] drm/msm/dsi: Modify port parsing Archit Taneja
2016-06-10 10:46 ` [PATCH v2 05/10] drm/msm/dsi: Use generic PHY bindings Archit Taneja
2016-06-10 10:46 ` [PATCH v2 06/10] drm/msm/dsi: Use a standard DT binding for data lanes Archit Taneja
2016-06-10 10:46 ` [PATCH v2 08/10] dt-bindings: msm/dsi: Modify port and PHY bindings Archit Taneja
2016-06-14 12:31 ` Rob Herring
2016-06-10 10:46 ` [PATCH v2 09/10] dt-bindings: msm/dsi: Add assigned clocks bindings Archit Taneja
[not found] ` <1465555600-25742-1-git-send-email-architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-06-10 10:46 ` [PATCH v2 01/10] drm/msm/mdp5: Don't get source of MDP core clock Archit Taneja
2016-06-10 10:46 ` [PATCH v2 03/10] dt-bindings: msm/mdp: Fix up clock related bindings Archit Taneja
2016-06-13 19:03 ` Rob Herring
2016-06-16 5:08 ` Archit Taneja
2016-06-10 10:46 ` [PATCH v2 07/10] dt-bindings: msm/dsi: Use standard data lanes binding Archit Taneja
2016-06-13 19:53 ` Rob Herring
2016-06-10 10:46 ` [PATCH v2 10/10] dt-bindings: msm/dsi: Some binding doc cleanups Archit Taneja
2016-06-14 12:33 ` Rob Herring
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