From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Boyd Subject: Re: [PATCH v4 01/11] clk: sunxi: Add display and TCON0 clocks driver Date: Fri, 6 May 2016 15:30:02 -0700 Message-ID: <20160506223002.GE3492@codeaurora.org> References: <1461590572-4027-1-git-send-email-maxime.ripard@free-electrons.com> <1461590572-4027-2-git-send-email-maxime.ripard@free-electrons.com> Reply-To: sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: <1461590572-4027-2-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Maxime Ripard Cc: Mike Turquette , David Airlie , Chen-Yu Tsai , Rob Herring , Daniel Vetter , Hans de Goede , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, Boris Brezillon , Thomas Petazzoni , Alexander Kaplan , Laurent Pinchart List-Id: devicetree@vger.kernel.org On 04/25, Maxime Ripard wrote: > The A10 SoCs and its relatives has a special clock controller to drive the > display engines (both frontend and backend), that have a lot in common with > the clock to drive the first TCON channel. > > Add a driver to support both. > > Signed-off-by: Maxime Ripard > Acked-by: Rob Herring > --- Acked-by: Stephen Boyd Unless I can merge this into clk-next? Wasn't clear to me. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project