From: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Sricharan R <sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org,
robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
srinivas.kandagatla-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org,
treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
robin.murphy-5wv7dgnIgG8@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
stepanm-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
Subject: Re: [PATCH V4 2/7] documentation: iommu: Add bindings for msm,iommu-v0 ip
Date: Mon, 16 May 2016 11:44:14 -0500 [thread overview]
Message-ID: <20160516164414.GA25899@rob-hp-laptop> (raw)
In-Reply-To: <1463381341-30498-3-git-send-email-sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
On Mon, May 16, 2016 at 12:18:56PM +0530, Sricharan R wrote:
> The MSM IOMMU is an implementation compatible with the ARM VMSA short
> descriptor page tables. It provides address translation for bus masters outside
> of the CPU, each connected to the IOMMU through a port called micro-TLB.
> Adding the DT bindings for the same.
>
> Signed-off-by: Sricharan R <sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
> ---
> .../devicetree/bindings/iommu/msm,iommu-v0.txt | 64 ++++++++++++++++++++++
> 1 file changed, 64 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iommu/msm,iommu-v0.txt
>
> diff --git a/Documentation/devicetree/bindings/iommu/msm,iommu-v0.txt b/Documentation/devicetree/bindings/iommu/msm,iommu-v0.txt
> new file mode 100644
> index 0000000..b22c607
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iommu/msm,iommu-v0.txt
> @@ -0,0 +1,64 @@
> +* QCOM IOMMU
> +
> +The MSM IOMMU is an implementation compatible with the ARM VMSA short
> +descriptor page tables. It provides address translation for bus masters outside
> +of the CPU, each connected to the IOMMU through a port called micro-TLB.
> +
> +Required Properties:
> +
> + - compatible: Must contain "qcom,iommu-v0-apq8064".
qcom,apq8064-iommu would be the preferred order and I think you can drop
the v0.
--
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next prev parent reply other threads:[~2016-05-16 16:44 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-16 6:48 [PATCH V4 0/7] iommu/msm: Add DT adaptation and generic bindings support Sricharan R
2016-05-16 6:48 ` [PATCH V4 1/7] iommu/msm: Add DT adaptation Sricharan R
[not found] ` <1463381341-30498-1-git-send-email-sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-05-16 6:48 ` [PATCH V4 2/7] documentation: iommu: Add bindings for msm,iommu-v0 ip Sricharan R
[not found] ` <1463381341-30498-3-git-send-email-sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-05-16 16:44 ` Rob Herring [this message]
2016-05-18 12:08 ` Sricharan
2016-05-16 6:48 ` [PATCH V4 3/7] iommu/msm: Move the contents from msm_iommu_dev.c to msm_iommu.c Sricharan R
2016-05-16 6:48 ` [PATCH V4 4/7] iommu/msm: Add support for generic master bindings Sricharan R
2016-05-16 6:48 ` [PATCH V4 5/7] iommu/msm: use generic ARMV7S short descriptor pagetable ops Sricharan R
2016-05-16 6:49 ` [PATCH V4 6/7] iommu/msm: Use writel_relaxed and add a barrier Sricharan R
2016-05-17 13:52 ` Arnd Bergmann
2016-05-18 12:07 ` Sricharan
2016-05-18 12:15 ` Arnd Bergmann
2016-05-18 12:33 ` Sricharan
2016-05-20 11:18 ` Sricharan
2016-05-16 6:49 ` [PATCH V4 7/7] iommu/msm: Remove driver BROKEN Sricharan R
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