From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH 3/3] dt-bindings: Document the STM32 USB OTG DWC2 core binding Date: Fri, 24 Jun 2016 10:41:18 -0500 Message-ID: <20160624154118.GA4598@rob-hp-laptop> References: <1466562349-5043-1-git-send-email-bruherrera@gmail.com> <1466562349-5043-3-git-send-email-bruherrera@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1466562349-5043-3-git-send-email-bruherrera-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Bruno Herrera Cc: pawel.moll-5wv7dgnIgG8@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org, galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org, mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, johnyoun-HKixBCOQz3hWk0Htik3J/w@public.gmane.org, gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org, balbi-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, a.seppala-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org On Tue, Jun 21, 2016 at 11:25:49PM -0300, Bruno Herrera wrote: > Signed-off-by: Bruno Herrera > --- > Documentation/devicetree/bindings/usb/dwc2.txt | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt > index 20a68bf..79e5370 100644 > --- a/Documentation/devicetree/bindings/usb/dwc2.txt > +++ b/Documentation/devicetree/bindings/usb/dwc2.txt > @@ -11,6 +11,7 @@ Required properties: > - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs; > - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs; > - snps,dwc2: A generic DWC2 USB controller with default parameters. > + - st,stm32-fsotg: The DWC2 USB controller instance in STM32F4 SoCs in FS mode; This should go above snps,dwc2. What determines FS mode vs. HS? > - reg : Should contain 1 register range (address and length) > - interrupts : Should contain 1 interrupt > - clocks: clock provider specifier > -- > 2.7.4 (Apple Git-66) > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html