From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Cc: Michael Turquette
<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
dev-3kdeTeqwOZ9EV1b7eY7vFQ@public.gmane.org,
linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 4/9] clk: sunxi-ng: mux: Add support for mux tables
Date: Wed, 27 Jul 2016 08:48:09 +0200 [thread overview]
Message-ID: <20160727064809.GC6560@lukather> (raw)
In-Reply-To: <1469516671-19377-5-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 2236 bytes --]
On Tue, Jul 26, 2016 at 03:04:26PM +0800, Chen-Yu Tsai wrote:
> Some clock muxes have holes, i.e. invalid or unconnected inputs,
> between parent mux values.
>
> Add support for specifying a mux table to map clock parents to
> mux values.
>
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
> ---
> drivers/clk/sunxi-ng/ccu_mux.c | 12 ++++++++++++
> drivers/clk/sunxi-ng/ccu_mux.h | 12 ++++++++++--
> 2 files changed, 22 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/sunxi-ng/ccu_mux.c b/drivers/clk/sunxi-ng/ccu_mux.c
> index 1329b9ab481e..68b32f168a74 100644
> --- a/drivers/clk/sunxi-ng/ccu_mux.c
> +++ b/drivers/clk/sunxi-ng/ccu_mux.c
> @@ -107,6 +107,15 @@ u8 ccu_mux_helper_get_parent(struct ccu_common *common,
> parent = reg >> cm->shift;
> parent &= (1 << cm->width) - 1;
>
> + if (cm->table) {
> + int num_parents = clk_hw_get_num_parents(&common->hw);
> + int i;
> +
> + for (i = 0; i < num_parents; i++)
> + if (cm->table[i] == parent)
> + return i;
> + }
> +
> return parent;
> }
>
> @@ -117,6 +126,9 @@ int ccu_mux_helper_set_parent(struct ccu_common *common,
> unsigned long flags;
> u32 reg;
>
> + if (cm->table)
> + index = cm->table[index];
> +
> spin_lock_irqsave(common->lock, flags);
>
> reg = readl(common->base + common->reg);
> diff --git a/drivers/clk/sunxi-ng/ccu_mux.h b/drivers/clk/sunxi-ng/ccu_mux.h
> index d35ce5e93840..f0078de78712 100644
> --- a/drivers/clk/sunxi-ng/ccu_mux.h
> +++ b/drivers/clk/sunxi-ng/ccu_mux.h
> @@ -6,8 +6,9 @@
> #include "ccu_common.h"
>
> struct ccu_mux_internal {
> - u8 shift;
> - u8 width;
> + u8 shift;
> + u8 width;
> + const u8 *table;
>
> struct {
> u8 index;
> @@ -21,6 +22,13 @@ struct ccu_mux_internal {
> } variable_prediv;
> };
>
> +#define SUNXI_CLK_MUX_TABLE(_shift, _width, _table) \
> + { \
> + .shift = _shift, \
> + .width = _width, \
> + .table = _table, \
> + }
> +
I basically had the exact same patch done a few days ago :)
This is in my A64 serie, together with some cleanup on that macro that
is not consistent with the other internal structures.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
next prev parent reply other threads:[~2016-07-27 6:48 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-26 7:04 [PATCH 0/9] clk: sunxi-ng: Support A31/A31s CCU Chen-Yu Tsai
2016-07-26 7:04 ` [PATCH 3/9] clk: sunxi-ng: mux: Increase fixed pre-divider div size Chen-Yu Tsai
[not found] ` <1469516671-19377-4-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-27 6:43 ` Maxime Ripard
2016-07-26 7:04 ` [PATCH 4/9] clk: sunxi-ng: mux: Add support for mux tables Chen-Yu Tsai
2016-07-26 17:43 ` Jean-Francois Moine
2016-07-27 6:59 ` Maxime Ripard
2016-07-27 7:18 ` Jean-Francois Moine
2016-07-27 7:30 ` Chen-Yu Tsai
[not found] ` <20160727091827.e26f72701ce5758fa29aff7a-GANU6spQydw@public.gmane.org>
2016-07-27 7:40 ` Maxime Ripard
2016-07-27 8:36 ` Jean-Francois Moine
[not found] ` <20160727103649.9e6ef332847b5a5c8fac66af-GANU6spQydw@public.gmane.org>
2016-07-28 13:28 ` Maxime Ripard
2016-07-28 14:23 ` Jean-Francois Moine
[not found] ` <1469516671-19377-5-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-27 6:48 ` Maxime Ripard [this message]
[not found] ` <1469516671-19377-1-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-26 7:04 ` [PATCH resend 1/9] clk: sunxi-ng: Fix inverted test condition in ccu_helper_wait_for_lock Chen-Yu Tsai
[not found] ` <1469516671-19377-2-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-26 8:56 ` Maxime Ripard
2016-07-26 7:04 ` [PATCH 2/9] clk: sunxi-ng: nk: Make ccu_nk_find_best static Chen-Yu Tsai
[not found] ` <1469516671-19377-3-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-26 8:57 ` Maxime Ripard
2016-07-26 7:04 ` [PATCH 5/9] clk: sunxi-ng: mux: support fixed pre-dividers on multiple parents Chen-Yu Tsai
[not found] ` <1469516671-19377-6-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-27 7:26 ` Maxime Ripard
2016-07-27 8:38 ` Jean-Francois Moine
2016-07-26 7:04 ` [PATCH 6/9] clk: sunxi-ng: nkm: Add mux to support " Chen-Yu Tsai
[not found] ` <1469516671-19377-7-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-27 7:27 ` Maxime Ripard
2016-07-26 7:04 ` [PATCH 7/9] clk: sunxi-ng: mux: Add clk notifier functions Chen-Yu Tsai
[not found] ` <1469516671-19377-8-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-27 7:30 ` Maxime Ripard
2016-07-27 7:32 ` Chen-Yu Tsai
[not found] ` <CAGb2v67KcvzxadXYTWSg42+gpRxt4fhNmiWmtAD5D7r0+K4T8g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-07-27 7:43 ` Maxime Ripard
2016-07-26 7:04 ` [PATCH 8/9] clk: sunxi-ng: Add A31/A31s clocks Chen-Yu Tsai
2016-07-26 8:30 ` Jean-Francois Moine
2016-07-27 14:59 ` Rob Herring
[not found] ` <1469516671-19377-9-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-28 13:31 ` Maxime Ripard
2016-07-26 7:04 ` [PATCH 9/9] ARM: dts: sun6i: switch A31/A31s to new CCU clock bindings Chen-Yu Tsai
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