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From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Cc: Michael Turquette
	<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
	Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	dev-3kdeTeqwOZ9EV1b7eY7vFQ@public.gmane.org,
	linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 7/9] clk: sunxi-ng: mux: Add clk notifier functions
Date: Wed, 27 Jul 2016 09:30:05 +0200	[thread overview]
Message-ID: <20160727073005.GG6560@lukather> (raw)
In-Reply-To: <1469516671-19377-8-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>

[-- Attachment #1: Type: text/plain, Size: 2503 bytes --]

On Tue, Jul 26, 2016 at 03:04:29PM +0800, Chen-Yu Tsai wrote:
> On sunxi we support cpufreq by changing the clock rate of PLL-CPU.
> It's possible the clock output of the PLL goes out of the CPU's
> operational limits when the PLL's multipliers / dividers are changed
> and it hasn't stabilized yet. This would result in the CPU hanging.
> 
> To circumvent this, we temporarily switch the CPU mux clock to another
> stable clock before the rate change, and switch it back after the PLL
> stabilizes. This is done with clk notifiers registered on the PLL.
> 
> This patch adds common functions for notifiers to reparent mux clocks.
> 
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
> ---
>  drivers/clk/sunxi-ng/ccu_mux.c | 36 ++++++++++++++++++++++++++++++++++++
>  drivers/clk/sunxi-ng/ccu_mux.h | 14 ++++++++++++++
>  2 files changed, 50 insertions(+)
> 
> diff --git a/drivers/clk/sunxi-ng/ccu_mux.c b/drivers/clk/sunxi-ng/ccu_mux.c
> index f96eabb5d1f3..8a6e9065cb85 100644
> --- a/drivers/clk/sunxi-ng/ccu_mux.c
> +++ b/drivers/clk/sunxi-ng/ccu_mux.c
> @@ -8,7 +8,9 @@
>   * the License, or (at your option) any later version.
>   */
>  
> +#include <linux/clk.h>
>  #include <linux/clk-provider.h>
> +#include <linux/delay.h>
>  
>  #include "ccu_gate.h"
>  #include "ccu_mux.h"
> @@ -199,3 +201,37 @@ const struct clk_ops ccu_mux_ops = {
>  	.determine_rate	= __clk_mux_determine_rate,
>  	.recalc_rate	= ccu_mux_recalc_rate,
>  };
> +
> +/*
> + * This clock notifier is called when the frequency of the of the parent
> + * PLL clock is to be changed. The idea is to switch the parent to a
> + * stable clock, such as the main oscillator, while the PLL frequency
> + * stabilizes.
> + */
> +static int ccu_mux_notifier_cb(struct notifier_block *nb,
> +			       unsigned long event, void *data)
> +{
> +	struct ccu_mux_nb *mux = to_ccu_mux_nb(nb);
> +	int ret = 0;
> +
> +	if (event == PRE_RATE_CHANGE) {
> +		mux->original_index = ccu_mux_helper_get_parent(mux->common,
> +								mux->cm);
> +		ret = ccu_mux_helper_set_parent(mux->common, mux->cm,
> +						mux->bypass_index);
> +	} else if (event == POST_RATE_CHANGE) {
> +		ret = ccu_mux_helper_set_parent(mux->common, mux->cm,
> +						mux->original_index);
> +	}
> +
> +	udelay(mux->delay_us);

Are you sure we need that delay?

set_rate will end and notify you once the PLL rate is stable, so it
looks redundant.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

  parent reply	other threads:[~2016-07-27  7:30 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-26  7:04 [PATCH 0/9] clk: sunxi-ng: Support A31/A31s CCU Chen-Yu Tsai
2016-07-26  7:04 ` [PATCH 3/9] clk: sunxi-ng: mux: Increase fixed pre-divider div size Chen-Yu Tsai
     [not found]   ` <1469516671-19377-4-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-27  6:43     ` Maxime Ripard
2016-07-26  7:04 ` [PATCH 4/9] clk: sunxi-ng: mux: Add support for mux tables Chen-Yu Tsai
2016-07-26 17:43   ` Jean-Francois Moine
2016-07-27  6:59     ` Maxime Ripard
2016-07-27  7:18       ` Jean-Francois Moine
2016-07-27  7:30         ` Chen-Yu Tsai
     [not found]         ` <20160727091827.e26f72701ce5758fa29aff7a-GANU6spQydw@public.gmane.org>
2016-07-27  7:40           ` Maxime Ripard
2016-07-27  8:36             ` Jean-Francois Moine
     [not found]               ` <20160727103649.9e6ef332847b5a5c8fac66af-GANU6spQydw@public.gmane.org>
2016-07-28 13:28                 ` Maxime Ripard
2016-07-28 14:23                   ` Jean-Francois Moine
     [not found]   ` <1469516671-19377-5-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-27  6:48     ` Maxime Ripard
     [not found] ` <1469516671-19377-1-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-26  7:04   ` [PATCH resend 1/9] clk: sunxi-ng: Fix inverted test condition in ccu_helper_wait_for_lock Chen-Yu Tsai
     [not found]     ` <1469516671-19377-2-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-26  8:56       ` Maxime Ripard
2016-07-26  7:04   ` [PATCH 2/9] clk: sunxi-ng: nk: Make ccu_nk_find_best static Chen-Yu Tsai
     [not found]     ` <1469516671-19377-3-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-26  8:57       ` Maxime Ripard
2016-07-26  7:04   ` [PATCH 5/9] clk: sunxi-ng: mux: support fixed pre-dividers on multiple parents Chen-Yu Tsai
     [not found]     ` <1469516671-19377-6-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-27  7:26       ` Maxime Ripard
2016-07-27  8:38     ` Jean-Francois Moine
2016-07-26  7:04   ` [PATCH 6/9] clk: sunxi-ng: nkm: Add mux to support " Chen-Yu Tsai
     [not found]     ` <1469516671-19377-7-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-27  7:27       ` Maxime Ripard
2016-07-26  7:04   ` [PATCH 7/9] clk: sunxi-ng: mux: Add clk notifier functions Chen-Yu Tsai
     [not found]     ` <1469516671-19377-8-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-27  7:30       ` Maxime Ripard [this message]
2016-07-27  7:32         ` Chen-Yu Tsai
     [not found]           ` <CAGb2v67KcvzxadXYTWSg42+gpRxt4fhNmiWmtAD5D7r0+K4T8g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-07-27  7:43             ` Maxime Ripard
2016-07-26  7:04   ` [PATCH 8/9] clk: sunxi-ng: Add A31/A31s clocks Chen-Yu Tsai
2016-07-26  8:30     ` Jean-Francois Moine
2016-07-27 14:59     ` Rob Herring
     [not found]     ` <1469516671-19377-9-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
2016-07-28 13:31       ` Maxime Ripard
2016-07-26  7:04   ` [PATCH 9/9] ARM: dts: sun6i: switch A31/A31s to new CCU clock bindings Chen-Yu Tsai

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