[PATCH 00/20] MIPS: SEAD3 device tree conversion

[PATCH 00/20] MIPS: SEAD3 device tree conversion

[Paul Burton]

Although the SEAD3 board has already made some minimal use of device
tree, until now most peripherals have been left probed by platform code.

This series converts all SEAD3 peripherals to instead be probed from
device tree. The amount of platform code is significantly reduced
leaving SEAD3 primed & ready for a wider task of genericising the
kernel.

Applies atop v4.8-rc1.

Paul Burton (20):
  MIPS: SEAD3: Split obj-y entries across lines
  MIPS: SEAD3: Probe interrupt controllers using DT
  MIPS: SEAD3: Probe UARTs using DT
  MIPS: SEAD3: Use generic ns16550a earlycon support
  MIPS: SEAD3: Probe ethernet controller using DT
  usb: host: ehci-sead3: Support probing using device tree
  MIPS: SEAD3: Probe EHCI controller using DT
  usb: host: ehci-sead3: Remove non-DT probe code
  SEAD3: Probe parallel flash via DT
  MIPS: SEAD3: Use register-bit-led driver via DT for LEDs
  leds: Remove SEAD3 driver
  MIPS: SEAD3: Reset via generic syscon-reboot driver & DT
  MIPS: SEAD3: Use generic restart-poweroff driver
  MIPS: SEAD3: Parse memsize in DT shim
  MIPS: SEAD3: Drop use of cobalt fbdev driver
  fbdev: cobalt_lcdfb: Drop SEAD3 support
  dt-bindings: img-ascii-lcd: Document a binding for simple ASCII LCDs
  auxdisplay: img-ascii-lcd: driver for simple ASCII LCD displays
  MIPS: SEAD3: Use img-ascii-lcd driver
  MIPS: SEAD3: Remove custom read_persistent_clock

 .../bindings/auxdisplay/img-ascii-lcd.txt          |  17 +
 MAINTAINERS                                        |   6 +
 arch/mips/Kconfig                                  |   1 -
 arch/mips/boot/dts/mti/sead3.dts                   | 228 +++++++++++
 arch/mips/configs/sead3_defconfig                  |   8 +
 arch/mips/include/asm/mach-sead3/sead3-dtshim.h    |  29 ++
 arch/mips/include/asm/mips-boards/sead3int.h       |  32 --
 arch/mips/mti-sead3/Makefile                       |  10 +-
 arch/mips/mti-sead3/sead3-console.c                |  46 ---
 arch/mips/mti-sead3/sead3-display.c                |  77 ----
 arch/mips/mti-sead3/sead3-dtshim.c                 | 291 ++++++++++++++
 arch/mips/mti-sead3/sead3-init.c                   |  52 ---
 arch/mips/mti-sead3/sead3-int.c                    |  27 +-
 arch/mips/mti-sead3/sead3-lcd.c                    |  43 --
 arch/mips/mti-sead3/sead3-platform.c               | 223 -----------
 arch/mips/mti-sead3/sead3-reset.c                  |  40 --
 arch/mips/mti-sead3/sead3-setup.c                  |  77 +---
 arch/mips/mti-sead3/sead3-time.c                   |   8 -
 drivers/auxdisplay/Kconfig                         |   9 +
 drivers/auxdisplay/Makefile                        |   1 +
 drivers/auxdisplay/img-ascii-lcd.c                 | 443 +++++++++++++++++++++
 drivers/leds/Kconfig                               |  10 -
 drivers/leds/Makefile                              |   1 -
 drivers/leds/leds-sead3.c                          |  78 ----
 drivers/usb/host/ehci-sead3.c                      |  21 +-
 drivers/video/fbdev/Kconfig                        |   2 +-
 drivers/video/fbdev/cobalt_lcdfb.c                 |  42 --
 27 files changed, 1061 insertions(+), 761 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt
 create mode 100644 arch/mips/include/asm/mach-sead3/sead3-dtshim.h
 delete mode 100644 arch/mips/include/asm/mips-boards/sead3int.h
 delete mode 100644 arch/mips/mti-sead3/sead3-console.c
 delete mode 100644 arch/mips/mti-sead3/sead3-display.c
 create mode 100644 arch/mips/mti-sead3/sead3-dtshim.c
 delete mode 100644 arch/mips/mti-sead3/sead3-lcd.c
 delete mode 100644 arch/mips/mti-sead3/sead3-platform.c
 delete mode 100644 arch/mips/mti-sead3/sead3-reset.c
 create mode 100644 drivers/auxdisplay/img-ascii-lcd.c
 delete mode 100644 drivers/leds/leds-sead3.c

-- 
2.9.2

[PATCH 02/20] MIPS: SEAD3: Probe interrupt controllers using DT

[Paul Burton]

Probe the CPU interrupt controller & optional Global Interrupt
Controller (GIC) using devicetree rather than platform code. Because the
bootloader on SEAD3 does not provide a device tree to the kernel & the
device tree is always built in, we patch out the GIC node during boot if
we detect that a GIC is not present in the system.

The appropriate IRQ domain is discovered by platform code setting up
device IRQ numbers temporarily. It will be removed by further patches
which move the devices towards being probed via device tree.

No behavioural change is intended by this patch.

Signed-off-by: Paul Burton <paul.burton-1AXoQHu6uovQT0dZR+AlfA@public.gmane.org>
---

 arch/mips/boot/dts/mti/sead3.dts                | 31 +++++++++
 arch/mips/include/asm/mach-sead3/sead3-dtshim.h | 29 ++++++++
 arch/mips/include/asm/mips-boards/sead3int.h    |  5 --
 arch/mips/mti-sead3/Makefile                    |  1 +
 arch/mips/mti-sead3/sead3-dtshim.c              | 91 +++++++++++++++++++++++++
 arch/mips/mti-sead3/sead3-int.c                 | 27 ++------
 arch/mips/mti-sead3/sead3-platform.c            | 43 +++++++++---
 arch/mips/mti-sead3/sead3-setup.c               | 13 ++--
 8 files changed, 196 insertions(+), 44 deletions(-)
 create mode 100644 arch/mips/include/asm/mach-sead3/sead3-dtshim.h
 create mode 100644 arch/mips/mti-sead3/sead3-dtshim.c

diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts
index e4b317d..051b3a9 100644
--- a/arch/mips/boot/dts/mti/sead3.dts
+++ b/arch/mips/boot/dts/mti/sead3.dts
@@ -4,10 +4,13 @@
 /memreserve/ 0x00001000 0x000ef000;	// ROM data
 /memreserve/ 0x000f0000 0x004cc000;	// reserved
 
+#include <dt-bindings/interrupt-controller/mips-gic.h>
+
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
 	compatible = "mti,sead-3";
+	interrupt-parent = <&gic>;
 
 	cpus {
 		cpu@0 {
@@ -19,4 +22,32 @@
 		device_type = "memory";
 		reg = <0x0 0x08000000>;
 	};
+
+	cpu_intc: interrupt-controller {
+		compatible = "mti,cpu-interrupt-controller";
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	gic: interrupt-controller@1b1c0000 {
+		compatible = "mti,gic";
+		reg = <0x1b1c0000 0x20000>;
+
+		interrupt-controller;
+		#interrupt-cells = <3>;
+
+		/*
+		 * Declare the interrupt-parent even though the mti,gic
+		 * binding doesn't require it, such that the kernel can
+		 * figure out that cpu_intc is the root interrupt
+		 * controller & should be probed first.
+		 */
+		interrupt-parent = <&cpu_intc>;
+
+		timer {
+			compatible = "mti,gic-timer";
+			interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
+		};
+	};
 };
diff --git a/arch/mips/include/asm/mach-sead3/sead3-dtshim.h b/arch/mips/include/asm/mach-sead3/sead3-dtshim.h
new file mode 100644
index 0000000..f5d7d9c
--- /dev/null
+++ b/arch/mips/include/asm/mach-sead3/sead3-dtshim.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ * Author: Paul Burton <paul.burton-1AXoQHu6uovQT0dZR+AlfA@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __MIPS_SEAD3_DTSHIM_H__
+#define __MIPS_SEAD3_DTSHIM_H__
+
+#include <linux/init.h>
+
+#ifdef CONFIG_MIPS_SEAD3
+
+extern void __init *sead3_dt_shim(void *fdt);
+
+#else /* !CONFIG_MIPS_SEAD3 */
+
+static inline void *sead3_dt_shim(void *fdt)
+{
+	return fdt;
+}
+
+#endif /* !CONFIG_MIPS_SEAD3 */
+
+#endif /* __MIPS_SEAD3_DTSHIM_H__ */
diff --git a/arch/mips/include/asm/mips-boards/sead3int.h b/arch/mips/include/asm/mips-boards/sead3int.h
index 8932c7d..bd85da3 100644
--- a/arch/mips/include/asm/mips-boards/sead3int.h
+++ b/arch/mips/include/asm/mips-boards/sead3int.h
@@ -12,12 +12,7 @@
 
 #include <linux/irqchip/mips-gic.h>
 
-/* SEAD-3 GIC address space definitions. */
-#define GIC_BASE_ADDR		0x1b1c0000
-#define GIC_ADDRSPACE_SZ	(128 * 1024)
-
 /* CPU interrupt offsets */
-#define CPU_INT_GIC		2
 #define CPU_INT_EHCI		2
 #define CPU_INT_UART0		4
 #define CPU_INT_UART1		4
diff --git a/arch/mips/mti-sead3/Makefile b/arch/mips/mti-sead3/Makefile
index 8b03cfb..aad67aa 100644
--- a/arch/mips/mti-sead3/Makefile
+++ b/arch/mips/mti-sead3/Makefile
@@ -10,6 +10,7 @@
 #
 obj-y := sead3-lcd.o
 obj-y += sead3-display.o
+obj-y += sead3-dtshim.o
 obj-y += sead3-init.o
 obj-y += sead3-int.o
 obj-y += sead3-platform.o
diff --git a/arch/mips/mti-sead3/sead3-dtshim.c b/arch/mips/mti-sead3/sead3-dtshim.c
new file mode 100644
index 0000000..1592d07
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-dtshim.c
@@ -0,0 +1,91 @@
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ * Author: Paul Burton <paul.burton-1AXoQHu6uovQT0dZR+AlfA@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#define pr_fmt(fmt) "sead3-dtshim: " fmt
+
+#include <linux/libfdt.h>
+#include <linux/printk.h>
+
+#include <asm/io.h>
+
+#define SEAD_CONFIG			CKSEG1ADDR(0x1b100110)
+#define SEAD_CONFIG_GIC_PRESENT		BIT(1)
+
+static unsigned char fdt_buf[16 << 10] __initdata;
+
+static int remove_gic(void *fdt)
+{
+	int gic_off, cpu_off, err;
+	uint32_t cfg, cpu_phandle;
+
+	/* leave the GIC node intact if a GIC is present */
+	cfg = __raw_readl((uint32_t *)SEAD_CONFIG);
+	if (cfg & SEAD_CONFIG_GIC_PRESENT)
+		return 0;
+
+	gic_off = fdt_node_offset_by_compatible(fdt, -1, "mti,gic");
+	if (gic_off < 0) {
+		pr_err("unable to find DT GIC node: %d\n", gic_off);
+		return gic_off;
+	}
+
+	err = fdt_nop_node(fdt, gic_off);
+	if (err) {
+		pr_err("unable to nop GIC node\n");
+		return err;
+	}
+
+	cpu_off = fdt_node_offset_by_compatible(fdt, -1,
+			"mti,cpu-interrupt-controller");
+	if (cpu_off < 0) {
+		pr_err("unable to find CPU intc node: %d\n", cpu_off);
+		return cpu_off;
+	}
+
+	cpu_phandle = fdt_get_phandle(fdt, cpu_off);
+	if (!cpu_phandle) {
+		pr_err("unable to get CPU intc phandle\n");
+		return -EINVAL;
+	}
+
+	err = fdt_setprop_u32(fdt, 0, "interrupt-parent", cpu_phandle);
+	if (err) {
+		pr_err("unable to set root interrupt-parent: %d\n", err);
+		return err;
+	}
+
+	return 0;
+}
+
+void __init *sead3_dt_shim(void *fdt)
+{
+	int err;
+
+	if (fdt_check_header(fdt))
+		panic("Corrupt DT");
+
+	/* if this isn't SEAD3, leave the DT alone */
+	if (fdt_node_check_compatible(fdt, 0, "mti,sead-3"))
+		return fdt;
+
+	err = fdt_open_into(fdt, fdt_buf, sizeof(fdt_buf));
+	if (err)
+		panic("Unable to open FDT: %d", err);
+
+	err = remove_gic(fdt_buf);
+	if (err)
+		panic("Unable to patch FDT: %d", err);
+
+	err = fdt_pack(fdt_buf);
+	if (err)
+		panic("Unable to pack FDT: %d\n", err);
+
+	return fdt_buf;
+}
diff --git a/arch/mips/mti-sead3/sead3-int.c b/arch/mips/mti-sead3/sead3-int.c
index e31e17f..2e6b732 100644
--- a/arch/mips/mti-sead3/sead3-int.c
+++ b/arch/mips/mti-sead3/sead3-int.c
@@ -6,37 +6,18 @@
  * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
  */
 #include <linux/init.h>
-#include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqchip/mips-gic.h>
-#include <linux/io.h>
 
-#include <asm/irq_cpu.h>
-#include <asm/setup.h>
-
-#include <asm/mips-boards/sead3int.h>
-
-#define SEAD_CONFIG_GIC_PRESENT_SHF	1
-#define SEAD_CONFIG_GIC_PRESENT_MSK	(1 << SEAD_CONFIG_GIC_PRESENT_SHF)
-#define SEAD_CONFIG_BASE		0x1b100110
-#define SEAD_CONFIG_SIZE		4
-
-static void __iomem *sead3_config_reg;
+#include <asm/cpu-info.h>
+#include <asm/irq.h>
 
 void __init arch_init_irq(void)
 {
-	if (!cpu_has_veic)
-		mips_cpu_irq_init();
+	irqchip_init();
 
-	sead3_config_reg = ioremap_nocache(SEAD_CONFIG_BASE, SEAD_CONFIG_SIZE);
-	gic_present = (__raw_readl(sead3_config_reg) &
-		       SEAD_CONFIG_GIC_PRESENT_MSK) >>
-		SEAD_CONFIG_GIC_PRESENT_SHF;
 	pr_info("GIC: %spresent\n", (gic_present) ? "" : "not ");
 	pr_info("EIC: %s\n",
 		(current_cpu_data.options & MIPS_CPU_VEIC) ?  "on" : "off");
-
-	if (gic_present)
-		gic_init(GIC_BASE_ADDR, GIC_ADDRSPACE_SZ, CPU_INT_GIC,
-			 MIPS_GIC_IRQ_BASE);
 }
 
diff --git a/arch/mips/mti-sead3/sead3-platform.c b/arch/mips/mti-sead3/sead3-platform.c
index 73b73ef..12cf905 100644
--- a/arch/mips/mti-sead3/sead3-platform.c
+++ b/arch/mips/mti-sead3/sead3-platform.c
@@ -9,8 +9,10 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/irqchip/mips-gic.h>
+#include <linux/irqdomain.h>
 #include <linux/leds.h>
 #include <linux/mtd/physmap.h>
+#include <linux/of.h>
 #include <linux/platform_device.h>
 #include <linux/serial_8250.h>
 #include <linux/smsc911x.h>
@@ -204,16 +206,41 @@ static struct platform_device *sead3_platform_devices[] __initdata = {
 
 static int __init sead3_platforms_device_init(void)
 {
+	const char *intc_compat;
+	struct device_node *node;
+	struct irq_domain *irqd;
+
+	if (gic_present)
+		intc_compat = "mti,gic"
+	else
+		intc_compat = "mti,cpu-interrupt-controller";
+
+	node = of_find_compatible_node(NULL, NULL, intc_compat);
+	if (!node) {
+		pr_err("unable to find interrupt controller DT node\n");
+		return -ENODEV;
+	}
+
+	irqd = irq_find_host(node);
+	if (!irqd) {
+		pr_err("unable to find interrupt controller IRQ domain\n");
+		return -ENODEV;
+	}
+
 	if (gic_present) {
-		uart8250_data[0].irq = MIPS_GIC_IRQ_BASE + GIC_INT_UART0;
-		uart8250_data[1].irq = MIPS_GIC_IRQ_BASE + GIC_INT_UART1;
-		ehci_resources[1].start = MIPS_GIC_IRQ_BASE + GIC_INT_EHCI;
-		sead3_net_resources[1].start = MIPS_GIC_IRQ_BASE + GIC_INT_NET;
+		uart8250_data[0].irq = irq_create_mapping(irqd, GIC_INT_UART0);
+		uart8250_data[1].irq = irq_create_mapping(irqd, GIC_INT_UART1);
+		ehci_resources[1].start =
+			irq_create_mapping(irqd, GIC_INT_EHCI);
+		sead3_net_resources[1].start =
+			irq_create_mapping(irqd, GIC_INT_NET);
 	} else {
-		uart8250_data[0].irq = MIPS_CPU_IRQ_BASE + CPU_INT_UART0;
-		uart8250_data[1].irq = MIPS_CPU_IRQ_BASE + CPU_INT_UART1;
-		ehci_resources[1].start = MIPS_CPU_IRQ_BASE + CPU_INT_EHCI;
-		sead3_net_resources[1].start = MIPS_CPU_IRQ_BASE + CPU_INT_NET;
+		uart8250_data[0].irq = irq_create_mapping(irqd, CPU_INT_UART0);
+		uart8250_data[1].irq = irq_create_mapping(irqd, CPU_INT_UART1);
+		ehci_resources[1].start =
+			irq_create_mapping(irqd, CPU_INT_EHCI);
+		sead3_net_resources[1].start =
+			irq_create_mapping(irqd, CPU_INT_NET);
 	}
 
 	return platform_add_devices(sead3_platform_devices,
diff --git a/arch/mips/mti-sead3/sead3-setup.c b/arch/mips/mti-sead3/sead3-setup.c
index edfcaf0..c4fc0c6 100644
--- a/arch/mips/mti-sead3/sead3-setup.c
+++ b/arch/mips/mti-sead3/sead3-setup.c
@@ -13,6 +13,7 @@
 #include <asm/prom.h>
 #include <asm/fw/fw.h>
 
+#include <asm/mach-sead3/sead3-dtshim.h>
 #include <asm/mips-boards/generic.h>
 
 const char *get_system_type(void)
@@ -89,20 +90,16 @@ void __init *plat_get_fdt(void)
 
 void __init plat_mem_setup(void)
 {
+	void *fdt = plat_get_fdt();
+
 	/* allow command line/bootloader env to override memory size in DT */
 	parse_memsize_param();
 
-	/*
-	 * Load the builtin devicetree. This causes the chosen node to be
-	 * parsed resulting in our memory appearing
-	 */
-	__dt_setup_arch(__dtb_start);
+	fdt = sead3_dt_shim(fdt);
+	__dt_setup_arch(fdt);
 }
 
 void __init device_tree_init(void)
 {
-	if (!initial_boot_params)
-		return;
-
 	unflatten_and_copy_device_tree();
 }
-- 
2.9.2

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[PATCH 03/20] MIPS: SEAD3: Probe UARTs using DT

[Paul Burton]

Probe the UARTs on SEAD3 boards using device tree rather than platform
code, in order to reduce the amount of the latter. This requires that
CONFIG_SERIAL_OF_PLATFORM be enabled, so enable it in sead3_defconfig.
The SEAD3 DT shim code is extended to read bootloader environment
variables to determine the appropriate UART & mode for kernel console
output & set the stdout-path property of the chosen node accordingly.

In contrast to the old platform code, which appears to have only ever
set "console=ttyS0,38400n8r" with the code in console_config never
having an effect, this will honor the "yamontty" environment variable to
select between the 2 UARTs on the board and then check the "modetty0" or
"modetty1" variable as appropriate to determine the UART configuration.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

 arch/mips/boot/dts/mti/sead3.dts             |  37 ++++++++++
 arch/mips/configs/sead3_defconfig            |   2 +
 arch/mips/include/asm/mips-boards/sead3int.h |   4 --
 arch/mips/mti-sead3/sead3-dtshim.c           | 104 ++++++++++++++++++++++++++-
 arch/mips/mti-sead3/sead3-init.c             |  46 ------------
 arch/mips/mti-sead3/sead3-platform.c         |  30 --------
 6 files changed, 142 insertions(+), 81 deletions(-)

diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts
index 051b3a9..3f681c5 100644
--- a/arch/mips/boot/dts/mti/sead3.dts
+++ b/arch/mips/boot/dts/mti/sead3.dts
@@ -12,6 +12,15 @@
 	compatible = "mti,sead-3";
 	interrupt-parent = <&gic>;
 
+	chosen {
+		stdout-path = "uart1:115200";
+	};
+
+	aliases {
+		uart0 = &uart0;
+		uart1 = &uart1;
+	};
+
 	cpus {
 		cpu@0 {
 			compatible = "mti,mips14KEc", "mti,mips14Kc";
@@ -50,4 +59,32 @@
 			interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
 		};
 	};
+
+	/* UART connected to FTDI & miniUSB socket */
+	uart0: uart@1f000900 {
+		compatible = "ns16550a";
+		reg = <0x1f000900 0x20>;
+		reg-io-width = <4>;
+		reg-shift = <2>;
+
+		clock-frequency = <14745600>;
+
+		interrupts = <3>; /* GIC 3 or CPU 4 */
+
+		no-loopback-test;
+	};
+
+	/* UART connected to RS232 socket */
+	uart1: uart@1f000800 {
+		compatible = "ns16550a";
+		reg = <0x1f000800 0x20>;
+		reg-io-width = <4>;
+		reg-shift = <2>;
+
+		clock-frequency = <14745600>;
+
+		interrupts = <2>; /* GIC 2 or CPU 4 */
+
+		no-loopback-test;
+	};
 };
diff --git a/arch/mips/configs/sead3_defconfig b/arch/mips/configs/sead3_defconfig
index dae9354..deb48fb 100644
--- a/arch/mips/configs/sead3_defconfig
+++ b/arch/mips/configs/sead3_defconfig
@@ -39,6 +39,7 @@ CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_UBI=y
 CONFIG_MTD_UBI_GLUEBI=y
+CONFIG_OF=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_CRYPTOLOOP=m
 CONFIG_SCSI=y
@@ -70,6 +71,7 @@ CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=2
 CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_OF_PLATFORM=y
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 # CONFIG_I2C_COMPAT is not set
diff --git a/arch/mips/include/asm/mips-boards/sead3int.h b/arch/mips/include/asm/mips-boards/sead3int.h
index bd85da3..3a5e079 100644
--- a/arch/mips/include/asm/mips-boards/sead3int.h
+++ b/arch/mips/include/asm/mips-boards/sead3int.h
@@ -14,14 +14,10 @@
 
 /* CPU interrupt offsets */
 #define CPU_INT_EHCI		2
-#define CPU_INT_UART0		4
-#define CPU_INT_UART1		4
 #define CPU_INT_NET		6
 
 /* GIC interrupt offsets */
 #define GIC_INT_NET		GIC_SHARED_TO_HWIRQ(0)
-#define GIC_INT_UART1		GIC_SHARED_TO_HWIRQ(2)
-#define GIC_INT_UART0		GIC_SHARED_TO_HWIRQ(3)
 #define GIC_INT_EHCI		GIC_SHARED_TO_HWIRQ(5)
 
 #endif /* !(_MIPS_SEAD3INT_H) */
diff --git a/arch/mips/mti-sead3/sead3-dtshim.c b/arch/mips/mti-sead3/sead3-dtshim.c
index 1592d07..8314943 100644
--- a/arch/mips/mti-sead3/sead3-dtshim.c
+++ b/arch/mips/mti-sead3/sead3-dtshim.c
@@ -22,7 +22,8 @@ static unsigned char fdt_buf[16 << 10] __initdata;
 
 static int remove_gic(void *fdt)
 {
-	int gic_off, cpu_off, err;
+	const unsigned int cpu_uart_int = 4;
+	int gic_off, cpu_off, uart_off, err;
 	uint32_t cfg, cpu_phandle;
 
 	/* leave the GIC node intact if a GIC is present */
@@ -61,6 +62,103 @@ static int remove_gic(void *fdt)
 		return err;
 	}
 
+	uart_off = fdt_node_offset_by_compatible(fdt, -1, "ns16550a");
+	while (uart_off >= 0) {
+		err = fdt_setprop_u32(fdt, uart_off, "interrupts",
+				      cpu_uart_int);
+		if (err) {
+			pr_err("unable to set UART interrupts property: %d\n",
+			       err);
+			return err;
+		}
+
+		uart_off = fdt_node_offset_by_compatible(fdt, uart_off,
+							 "ns16550a");
+	}
+	if (uart_off != -FDT_ERR_NOTFOUND) {
+		pr_err("error searching for UART DT node: %d\n", uart_off);
+		return uart_off;
+	}
+
+	return 0;
+}
+
+static int serial_config(void *fdt)
+{
+	const char *yamontty, *mode_var;
+	char mode_var_name[9], path[18], parity;
+	unsigned int uart, baud, stop_bits;
+	bool hw_flow;
+	int chosen_off, err;
+
+	yamontty = fw_getenv("yamontty");
+	if (!yamontty || !strcmp(yamontty, "tty0")) {
+		uart = 0;
+	} else if (!strcmp(yamontty, "tty1")) {
+		uart = 1;
+	} else {
+		pr_warn("yamontty environment variable '%s' invalid\n",
+			yamontty);
+		uart = 0;
+	}
+
+	baud = stop_bits = 0;
+	parity = 0;
+	hw_flow = false;
+
+	snprintf(mode_var_name, sizeof(mode_var_name), "modetty%u", uart);
+	mode_var = fw_getenv(mode_var_name);
+	if (mode_var) {
+		while (mode_var[0] >= '0' && mode_var[0] <= '9') {
+			baud *= 10;
+			baud += mode_var[0] - '0';
+			mode_var++;
+		}
+		if (mode_var[0] == ',')
+			mode_var++;
+		if (mode_var[0])
+			parity = mode_var[0];
+		if (mode_var[0] == ',')
+			mode_var++;
+		if (mode_var[0])
+			stop_bits = mode_var[0] - '0';
+		if (mode_var[0] == ',')
+			mode_var++;
+		if (!strcmp(mode_var, "hw"))
+			hw_flow = true;
+	}
+
+	if (!baud)
+		baud = 38400;
+
+	if (parity != 'e' && parity != 'n' && parity != 'o')
+		parity = 'n';
+
+	if (stop_bits != 7 && stop_bits != 8)
+		stop_bits = 8;
+
+	WARN_ON(snprintf(path, sizeof(path), "uart%u:%u%c%u%s",
+			 uart, baud, parity, stop_bits,
+			 hw_flow ? "r" : "") >= sizeof(path));
+
+	/* find or add chosen node */
+	chosen_off = fdt_path_offset(fdt, "/chosen");
+	if (chosen_off == -FDT_ERR_NOTFOUND)
+		chosen_off = fdt_path_offset(fdt, "/chosen@0");
+	if (chosen_off == -FDT_ERR_NOTFOUND)
+		chosen_off = fdt_add_subnode(fdt, 0, "chosen");
+	if (chosen_off < 0) {
+		pr_err("Unable to find or add DT chosen node: %d\n",
+		       chosen_off);
+		return chosen_off;
+	}
+
+	err = fdt_setprop_string(fdt, chosen_off, "stdout-path", path);
+	if (err) {
+		pr_err("Unable to set stdout-path property: %d\n", err);
+		return err;
+	}
+
 	return 0;
 }
 
@@ -83,6 +181,10 @@ void __init *sead3_dt_shim(void *fdt)
 	if (err)
 		panic("Unable to patch FDT: %d", err);
 
+	err = serial_config(fdt_buf);
+	if (err)
+		panic("Unable to patch FDT: %d", err);
+
 	err = fdt_pack(fdt_buf);
 	if (err)
 		panic("Unable to pack FDT: %d\n", err);
diff --git a/arch/mips/mti-sead3/sead3-init.c b/arch/mips/mti-sead3/sead3-init.c
index 3572ea3..e81f5b7 100644
--- a/arch/mips/mti-sead3/sead3-init.c
+++ b/arch/mips/mti-sead3/sead3-init.c
@@ -17,47 +17,6 @@
 extern char except_vec_nmi;
 extern char except_vec_ejtag_debug;
 
-#ifdef CONFIG_SERIAL_8250_CONSOLE
-static void __init console_config(void)
-{
-	char console_string[40];
-	int baud = 0;
-	char parity = '\0', bits = '\0', flow = '\0';
-	char *s;
-
-	if ((strstr(fw_getcmdline(), "console=")) == NULL) {
-		s = fw_getenv("modetty0");
-		if (s) {
-			while (*s >= '0' && *s <= '9')
-				baud = baud*10 + *s++ - '0';
-			if (*s == ',')
-				s++;
-			if (*s)
-				parity = *s++;
-			if (*s == ',')
-				s++;
-			if (*s)
-				bits = *s++;
-			if (*s == ',')
-				s++;
-			if (*s == 'h')
-				flow = 'r';
-		}
-		if (baud == 0)
-			baud = 38400;
-		if (parity != 'n' && parity != 'o' && parity != 'e')
-			parity = 'n';
-		if (bits != '7' && bits != '8')
-			bits = '8';
-		if (flow == '\0')
-			flow = 'r';
-		sprintf(console_string, " console=ttyS0,%d%c%c%c", baud,
-			parity, bits, flow);
-		strcat(fw_getcmdline(), console_string);
-	}
-}
-#endif
-
 static void __init mips_nmi_setup(void)
 {
 	void *base;
@@ -140,11 +99,6 @@ void __init prom_init(void)
 	else if ((strstr(fw_getcmdline(), "console=ttyS1")) != NULL)
 		fw_init_early_console(1);
 #endif
-#ifdef CONFIG_SERIAL_8250_CONSOLE
-	if ((strstr(fw_getcmdline(), "console=")) == NULL)
-		strcat(fw_getcmdline(), " console=ttyS0,38400n8r");
-	console_config();
-#endif
 }
 
 void __init prom_free_prom_memory(void)
diff --git a/arch/mips/mti-sead3/sead3-platform.c b/arch/mips/mti-sead3/sead3-platform.c
index 12cf905..e772a05 100644
--- a/arch/mips/mti-sead3/sead3-platform.c
+++ b/arch/mips/mti-sead3/sead3-platform.c
@@ -14,35 +14,10 @@
 #include <linux/mtd/physmap.h>
 #include <linux/of.h>
 #include <linux/platform_device.h>
-#include <linux/serial_8250.h>
 #include <linux/smsc911x.h>
 
 #include <asm/mips-boards/sead3int.h>
 
-#define UART(base)							\
-{									\
-	.mapbase	= base,						\
-	.irq		= -1,						\
-	.uartclk	= 14745600,					\
-	.iotype		= UPIO_MEM32,					\
-	.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, \
-	.regshift	= 2,						\
-}
-
-static struct plat_serial8250_port uart8250_data[] = {
-	UART(0x1f000900),   /* ttyS0 = USB   */
-	UART(0x1f000800),   /* ttyS1 = RS232 */
-	{ },
-};
-
-static struct platform_device uart8250_device = {
-	.name			= "serial8250",
-	.id			= PLAT8250_DEV_PLATFORM2,
-	.dev			= {
-		.platform_data	= uart8250_data,
-	},
-};
-
 static struct smsc911x_platform_config sead3_smsc911x_data = {
 	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
@@ -195,7 +170,6 @@ static struct platform_device ehci_device = {
 };
 
 static struct platform_device *sead3_platform_devices[] __initdata = {
-	&uart8250_device,
 	&sead3_flash,
 	&pled_device,
 	&fled_device,
@@ -228,15 +202,11 @@ static int __init sead3_platforms_device_init(void)
 	}
 
 	if (gic_present) {
-		uart8250_data[0].irq = irq_create_mapping(irqd, GIC_INT_UART0);
-		uart8250_data[1].irq = irq_create_mapping(irqd, GIC_INT_UART1);
 		ehci_resources[1].start =
 			irq_create_mapping(irqd, GIC_INT_EHCI);
 		sead3_net_resources[1].start =
 			irq_create_mapping(irqd, GIC_INT_NET);
 	} else {
-		uart8250_data[0].irq = irq_create_mapping(irqd, CPU_INT_UART0);
-		uart8250_data[1].irq = irq_create_mapping(irqd, CPU_INT_UART1);
 		ehci_resources[1].start =
 			irq_create_mapping(irqd, CPU_INT_EHCI);
 		sead3_net_resources[1].start =
-- 
2.9.2

[PATCH 05/20] MIPS: SEAD3: Probe ethernet controller using DT

[Paul Burton]

Probe the smsc911x ethernet controller using device tree rather than
platform code, reducing the amount of the latter.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

 arch/mips/boot/dts/mti/sead3.dts             | 12 ++++++++++
 arch/mips/include/asm/mips-boards/sead3int.h |  2 --
 arch/mips/mti-sead3/sead3-dtshim.c           | 15 ++++++++++++-
 arch/mips/mti-sead3/sead3-platform.c         | 33 ----------------------------
 4 files changed, 26 insertions(+), 36 deletions(-)

diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts
index 3f681c5..29ed194 100644
--- a/arch/mips/boot/dts/mti/sead3.dts
+++ b/arch/mips/boot/dts/mti/sead3.dts
@@ -87,4 +87,16 @@
 
 		no-loopback-test;
 	};
+
+	eth@1f010000 {
+		compatible = "smsc,lan9115";
+		reg = <0x1f010000 0x10000>;
+		reg-io-width = <4>;
+
+		interrupts = <0>; /* GIC 0 or CPU 6 */
+
+		phy-mode = "mii";
+		smsc,irq-push-pull;
+		smsc,save-mac-address;
+	};
 };
diff --git a/arch/mips/include/asm/mips-boards/sead3int.h b/arch/mips/include/asm/mips-boards/sead3int.h
index 3a5e079..7fdb9d4 100644
--- a/arch/mips/include/asm/mips-boards/sead3int.h
+++ b/arch/mips/include/asm/mips-boards/sead3int.h
@@ -14,10 +14,8 @@
 
 /* CPU interrupt offsets */
 #define CPU_INT_EHCI		2
-#define CPU_INT_NET		6
 
 /* GIC interrupt offsets */
-#define GIC_INT_NET		GIC_SHARED_TO_HWIRQ(0)
 #define GIC_INT_EHCI		GIC_SHARED_TO_HWIRQ(5)
 
 #endif /* !(_MIPS_SEAD3INT_H) */
diff --git a/arch/mips/mti-sead3/sead3-dtshim.c b/arch/mips/mti-sead3/sead3-dtshim.c
index 8314943..50f3236 100644
--- a/arch/mips/mti-sead3/sead3-dtshim.c
+++ b/arch/mips/mti-sead3/sead3-dtshim.c
@@ -23,7 +23,8 @@ static unsigned char fdt_buf[16 << 10] __initdata;
 static int remove_gic(void *fdt)
 {
 	const unsigned int cpu_uart_int = 4;
-	int gic_off, cpu_off, uart_off, err;
+	const unsigned int cpu_eth_int = 6;
+	int gic_off, cpu_off, uart_off, eth_off, err;
 	uint32_t cfg, cpu_phandle;
 
 	/* leave the GIC node intact if a GIC is present */
@@ -80,6 +81,18 @@ static int remove_gic(void *fdt)
 		return uart_off;
 	}
 
+	eth_off = fdt_node_offset_by_compatible(fdt, -1, "smsc,lan9115");
+	if (eth_off < 0) {
+		pr_err("unable to find ethernet DT node: %d\n", eth_off);
+		return eth_off;
+	}
+
+	err = fdt_setprop_u32(fdt, eth_off, "interrupts", cpu_eth_int);
+	if (err) {
+		pr_err("unable to set ethernet interrupts property: %d\n", err);
+		return err;
+	}
+
 	return 0;
 }
 
diff --git a/arch/mips/mti-sead3/sead3-platform.c b/arch/mips/mti-sead3/sead3-platform.c
index e772a05..f79a890 100644
--- a/arch/mips/mti-sead3/sead3-platform.c
+++ b/arch/mips/mti-sead3/sead3-platform.c
@@ -14,37 +14,9 @@
 #include <linux/mtd/physmap.h>
 #include <linux/of.h>
 #include <linux/platform_device.h>
-#include <linux/smsc911x.h>
 
 #include <asm/mips-boards/sead3int.h>
 
-static struct smsc911x_platform_config sead3_smsc911x_data = {
-	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
-	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
-	.flags		= SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
-	.phy_interface	= PHY_INTERFACE_MODE_MII,
-};
-
-static struct resource sead3_net_resources[] = {
-	{
-		.start			= 0x1f010000,
-		.end			= 0x1f01ffff,
-		.flags			= IORESOURCE_MEM
-	}, {
-		.flags			= IORESOURCE_IRQ
-	}
-};
-
-static struct platform_device sead3_net_device = {
-	.name			= "smsc911x",
-	.id			= 0,
-	.dev			= {
-		.platform_data	= &sead3_smsc911x_data,
-	},
-	.num_resources		= ARRAY_SIZE(sead3_net_resources),
-	.resource		= sead3_net_resources
-};
-
 static struct mtd_partition sead3_mtd_partitions[] = {
 	{
 		.name =		"User FS",
@@ -175,7 +147,6 @@ static struct platform_device *sead3_platform_devices[] __initdata = {
 	&fled_device,
 	&sead3_led_device,
 	&ehci_device,
-	&sead3_net_device,
 };
 
 static int __init sead3_platforms_device_init(void)
@@ -204,13 +175,9 @@ static int __init sead3_platforms_device_init(void)
 	if (gic_present) {
 		ehci_resources[1].start =
 			irq_create_mapping(irqd, GIC_INT_EHCI);
-		sead3_net_resources[1].start =
-			irq_create_mapping(irqd, GIC_INT_NET);
 	} else {
 		ehci_resources[1].start =
 			irq_create_mapping(irqd, CPU_INT_EHCI);
-		sead3_net_resources[1].start =
-			irq_create_mapping(irqd, CPU_INT_NET);
 	}
 
 	return platform_add_devices(sead3_platform_devices,
-- 
2.9.2

[PATCH 07/20] MIPS: SEAD3: Probe EHCI controller using DT

[Paul Burton]

Probe the SEAD3 EHCI controller using device tree rather than platform
code, in order to reduce the amount of the latter.

Now that no devices probed from platform code require interrupts, remove
the retrieval of the IRQ domain & sead3int.h.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

 arch/mips/boot/dts/mti/sead3.dts             |  7 ++++
 arch/mips/include/asm/mips-boards/sead3int.h | 21 ----------
 arch/mips/mti-sead3/sead3-dtshim.c           | 15 ++++++-
 arch/mips/mti-sead3/sead3-platform.c         | 59 ----------------------------
 4 files changed, 21 insertions(+), 81 deletions(-)
 delete mode 100644 arch/mips/include/asm/mips-boards/sead3int.h

diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts
index 29ed194..66f7947 100644
--- a/arch/mips/boot/dts/mti/sead3.dts
+++ b/arch/mips/boot/dts/mti/sead3.dts
@@ -60,6 +60,13 @@
 		};
 	};
 
+	ehci@1b200000 {
+		compatible = "mti,sead3-ehci";
+		reg = <0x1b200000 0x1000>;
+
+		interrupts = <0>; /* GIC 0 or CPU 6 */
+	};
+
 	/* UART connected to FTDI & miniUSB socket */
 	uart0: uart@1f000900 {
 		compatible = "ns16550a";
diff --git a/arch/mips/include/asm/mips-boards/sead3int.h b/arch/mips/include/asm/mips-boards/sead3int.h
deleted file mode 100644
index 7fdb9d4..0000000
--- a/arch/mips/include/asm/mips-boards/sead3int.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000,2012 MIPS Technologies, Inc.  All rights reserved.
- *	Douglas Leung <douglas@mips.com>
- *	Steven J. Hill <sjhill@mips.com>
- */
-#ifndef _MIPS_SEAD3INT_H
-#define _MIPS_SEAD3INT_H
-
-#include <linux/irqchip/mips-gic.h>
-
-/* CPU interrupt offsets */
-#define CPU_INT_EHCI		2
-
-/* GIC interrupt offsets */
-#define GIC_INT_EHCI		GIC_SHARED_TO_HWIRQ(5)
-
-#endif /* !(_MIPS_SEAD3INT_H) */
diff --git a/arch/mips/mti-sead3/sead3-dtshim.c b/arch/mips/mti-sead3/sead3-dtshim.c
index 50f3236..40f8e03 100644
--- a/arch/mips/mti-sead3/sead3-dtshim.c
+++ b/arch/mips/mti-sead3/sead3-dtshim.c
@@ -22,9 +22,10 @@ static unsigned char fdt_buf[16 << 10] __initdata;
 
 static int remove_gic(void *fdt)
 {
+	const unsigned int cpu_ehci_int = 2;
 	const unsigned int cpu_uart_int = 4;
 	const unsigned int cpu_eth_int = 6;
-	int gic_off, cpu_off, uart_off, eth_off, err;
+	int gic_off, cpu_off, uart_off, eth_off, ehci_off, err;
 	uint32_t cfg, cpu_phandle;
 
 	/* leave the GIC node intact if a GIC is present */
@@ -93,6 +94,18 @@ static int remove_gic(void *fdt)
 		return err;
 	}
 
+	ehci_off = fdt_node_offset_by_compatible(fdt, -1, "mti,sead3-ehci");
+	if (ehci_off < 0) {
+		pr_err("unable to find EHCI DT node: %d\n", ehci_off);
+		return ehci_off;
+	}
+
+	err = fdt_setprop_u32(fdt, ehci_off, "interrupts", cpu_ehci_int);
+	if (err) {
+		pr_err("unable to set EHCI interrupts property: %d\n", err);
+		return err;
+	}
+
 	return 0;
 }
 
diff --git a/arch/mips/mti-sead3/sead3-platform.c b/arch/mips/mti-sead3/sead3-platform.c
index f79a890..21047b5 100644
--- a/arch/mips/mti-sead3/sead3-platform.c
+++ b/arch/mips/mti-sead3/sead3-platform.c
@@ -7,16 +7,10 @@
  */
 #include <linux/dma-mapping.h>
 #include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/irqchip/mips-gic.h>
-#include <linux/irqdomain.h>
 #include <linux/leds.h>
 #include <linux/mtd/physmap.h>
-#include <linux/of.h>
 #include <linux/platform_device.h>
 
-#include <asm/mips-boards/sead3int.h>
-
 static struct mtd_partition sead3_mtd_partitions[] = {
 	{
 		.name =		"User FS",
@@ -118,68 +112,15 @@ static struct platform_device sead3_led_device = {
         .id     = -1,
 };
 
-static struct resource ehci_resources[] = {
-	{
-		.start			= 0x1b200000,
-		.end			= 0x1b200fff,
-		.flags			= IORESOURCE_MEM
-	}, {
-		.flags			= IORESOURCE_IRQ
-	}
-};
-
-static u64 sead3_usbdev_dma_mask = DMA_BIT_MASK(32);
-
-static struct platform_device ehci_device = {
-	.name		= "sead3-ehci",
-	.id		= 0,
-	.dev		= {
-		.dma_mask		= &sead3_usbdev_dma_mask,
-		.coherent_dma_mask	= DMA_BIT_MASK(32)
-	},
-	.num_resources	= ARRAY_SIZE(ehci_resources),
-	.resource	= ehci_resources
-};
-
 static struct platform_device *sead3_platform_devices[] __initdata = {
 	&sead3_flash,
 	&pled_device,
 	&fled_device,
 	&sead3_led_device,
-	&ehci_device,
 };
 
 static int __init sead3_platforms_device_init(void)
 {
-	const char *intc_compat;
-	struct device_node *node;
-	struct irq_domain *irqd;
-
-	if (gic_present)
-		intc_compat = "mti,gic"
-	else
-		intc_compat = "mti,cpu-interrupt-controller";
-
-	node = of_find_compatible_node(NULL, NULL, intc_compat);
-	if (!node) {
-		pr_err("unable to find interrupt controller DT node\n");
-		return -ENODEV;
-	}
-
-	irqd = irq_find_host(node);
-	if (!irqd) {
-		pr_err("unable to find interrupt controller IRQ domain\n");
-		return -ENODEV;
-	}
-
-	if (gic_present) {
-		ehci_resources[1].start =
-			irq_create_mapping(irqd, GIC_INT_EHCI);
-	} else {
-		ehci_resources[1].start =
-			irq_create_mapping(irqd, CPU_INT_EHCI);
-	}
-
 	return platform_add_devices(sead3_platform_devices,
 				    ARRAY_SIZE(sead3_platform_devices));
 }
-- 
2.9.2

[PATCH 09/20] SEAD3: Probe parallel flash via DT

[Paul Burton]

Probe the system parallel flash using device tree rather than platform
code, in order to reduce the amount of the latter.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

 arch/mips/boot/dts/mti/sead3.dts     | 17 +++++++++++++++++
 arch/mips/mti-sead3/sead3-platform.c | 37 ------------------------------------
 2 files changed, 17 insertions(+), 37 deletions(-)

diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts
index 66f7947..7799826 100644
--- a/arch/mips/boot/dts/mti/sead3.dts
+++ b/arch/mips/boot/dts/mti/sead3.dts
@@ -67,6 +67,23 @@
 		interrupts = <0>; /* GIC 0 or CPU 6 */
 	};
 
+	pflash@1c000000 {
+		compatible = "intel,28f128j3", "cfi-flash";
+		reg = <0x1c000000 0x2000000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		user-fs@0 {
+			label = "User FS";
+			reg = <0x0 0x1fc0000>;
+		};
+
+		board-config@3e0000 {
+			label = "Board Config";
+			reg = <0x1fc0000 0x40000>;
+		};
+	};
+
 	/* UART connected to FTDI & miniUSB socket */
 	uart0: uart@1f000900 {
 		compatible = "ns16550a";
diff --git a/arch/mips/mti-sead3/sead3-platform.c b/arch/mips/mti-sead3/sead3-platform.c
index 21047b5..5c1f42a 100644
--- a/arch/mips/mti-sead3/sead3-platform.c
+++ b/arch/mips/mti-sead3/sead3-platform.c
@@ -8,44 +8,8 @@
 #include <linux/dma-mapping.h>
 #include <linux/init.h>
 #include <linux/leds.h>
-#include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 
-static struct mtd_partition sead3_mtd_partitions[] = {
-	{
-		.name =		"User FS",
-		.offset =	0x00000000,
-		.size =		0x01fc0000,
-	}, {
-		.name =		"Board Config",
-		.offset =	0x01fc0000,
-		.size =		0x00040000,
-		.mask_flags =	MTD_WRITEABLE
-	},
-};
-
-static struct physmap_flash_data sead3_flash_data = {
-	.width		= 4,
-	.nr_parts	= ARRAY_SIZE(sead3_mtd_partitions),
-	.parts		= sead3_mtd_partitions
-};
-
-static struct resource sead3_flash_resource = {
-	.start		= 0x1c000000,
-	.end		= 0x1dffffff,
-	.flags		= IORESOURCE_MEM
-};
-
-static struct platform_device sead3_flash = {
-	.name		= "physmap-flash",
-	.id		= 0,
-	.dev		= {
-		.platform_data	= &sead3_flash_data,
-	},
-	.num_resources	= 1,
-	.resource	= &sead3_flash_resource,
-};
-
 #define LEDFLAGS(bits, shift)		\
 	((bits << 8) | (shift << 8))
 
@@ -113,7 +77,6 @@ static struct platform_device sead3_led_device = {
 };
 
 static struct platform_device *sead3_platform_devices[] __initdata = {
-	&sead3_flash,
 	&pled_device,
 	&fled_device,
 	&sead3_led_device,
-- 
2.9.2

[PATCH 10/20] MIPS: SEAD3: Use register-bit-led driver via DT for LEDs

[Paul Burton]

Probe a driver for the PLED & FLED LEDs found on the SEAD3 board using
the register-bit-led driver via device tree, rather than a custom driver
via platform code. Enable support for the register-bit-led driver & its
prerequisite syscon in sead3_defconfig.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

 arch/mips/boot/dts/mti/sead3.dts     | 103 +++++++++++++++++++++++++++++++++++
 arch/mips/configs/sead3_defconfig    |   2 +
 arch/mips/mti-sead3/Makefile         |   1 -
 arch/mips/mti-sead3/sead3-platform.c |  91 -------------------------------
 4 files changed, 105 insertions(+), 92 deletions(-)
 delete mode 100644 arch/mips/mti-sead3/sead3-platform.c

diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts
index 7799826..563e2636 100644
--- a/arch/mips/boot/dts/mti/sead3.dts
+++ b/arch/mips/boot/dts/mti/sead3.dts
@@ -84,6 +84,109 @@
 		};
 	};
 
+	system-controller@1f000200 {
+		compatible = "mti,sead3-cpld", "syscon", "simple-mfd";
+		reg = <0x1f000200 0x300>;
+
+		led@10.0 {
+			compatible = "register-bit-led";
+			offset = <0x10>;
+			mask = <0x1>;
+			label = "pled0";
+		};
+		led@10.1 {
+			compatible = "register-bit-led";
+			offset = <0x10>;
+			mask = <0x2>;
+			label = "pled1";
+		};
+		led@10.2 {
+			compatible = "register-bit-led";
+			offset = <0x10>;
+			mask = <0x4>;
+			label = "pled2";
+		};
+		led@10.3 {
+			compatible = "register-bit-led";
+			offset = <0x10>;
+			mask = <0x8>;
+			label = "pled3";
+		};
+		led@10.4 {
+			compatible = "register-bit-led";
+			offset = <0x10>;
+			mask = <0x10>;
+			label = "pled4";
+		};
+		led@10.5 {
+			compatible = "register-bit-led";
+			offset = <0x10>;
+			mask = <0x20>;
+			label = "pled5";
+		};
+		led@10.6 {
+			compatible = "register-bit-led";
+			offset = <0x10>;
+			mask = <0x40>;
+			label = "pled6";
+		};
+		led@10.7 {
+			compatible = "register-bit-led";
+			offset = <0x10>;
+			mask = <0x80>;
+			label = "pled7";
+		};
+
+		led@18.0 {
+			compatible = "register-bit-led";
+			offset = <0x18>;
+			mask = <0x1>;
+			label = "fled0";
+		};
+		led@18.1 {
+			compatible = "register-bit-led";
+			offset = <0x18>;
+			mask = <0x2>;
+			label = "fled1";
+		};
+		led@18.2 {
+			compatible = "register-bit-led";
+			offset = <0x18>;
+			mask = <0x4>;
+			label = "fled2";
+		};
+		led@18.3 {
+			compatible = "register-bit-led";
+			offset = <0x18>;
+			mask = <0x8>;
+			label = "fled3";
+		};
+		led@18.4 {
+			compatible = "register-bit-led";
+			offset = <0x18>;
+			mask = <0x10>;
+			label = "fled4";
+		};
+		led@18.5 {
+			compatible = "register-bit-led";
+			offset = <0x18>;
+			mask = <0x20>;
+			label = "fled5";
+		};
+		led@18.6 {
+			compatible = "register-bit-led";
+			offset = <0x18>;
+			mask = <0x40>;
+			label = "fled6";
+		};
+		led@18.7 {
+			compatible = "register-bit-led";
+			offset = <0x18>;
+			mask = <0x80>;
+			label = "fled7";
+		};
+	};
+
 	/* UART connected to FTDI & miniUSB socket */
 	uart0: uart@1f000900 {
 		compatible = "ns16550a";
diff --git a/arch/mips/configs/sead3_defconfig b/arch/mips/configs/sead3_defconfig
index 23cce81..e1c6582 100644
--- a/arch/mips/configs/sead3_defconfig
+++ b/arch/mips/configs/sead3_defconfig
@@ -81,6 +81,7 @@ CONFIG_I2C_CHARDEV=y
 # CONFIG_I2C_HELPER_AUTO is not set
 CONFIG_SPI=y
 CONFIG_SENSORS_ADT7475=y
+CONFIG_MFD_SYSCON=y
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_LCD_CLASS_DEVICE=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
@@ -95,6 +96,7 @@ CONFIG_MMC_DEBUG=y
 CONFIG_MMC_SPI=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_SYSCON=y
 CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_RTC_CLASS=y
diff --git a/arch/mips/mti-sead3/Makefile b/arch/mips/mti-sead3/Makefile
index a58b6d9..04ea002 100644
--- a/arch/mips/mti-sead3/Makefile
+++ b/arch/mips/mti-sead3/Makefile
@@ -13,7 +13,6 @@ obj-y += sead3-display.o
 obj-y += sead3-dtshim.o
 obj-y += sead3-init.o
 obj-y += sead3-int.o
-obj-y += sead3-platform.o
 obj-y += sead3-reset.o
 obj-y += sead3-setup.o
 obj-y += sead3-time.o
diff --git a/arch/mips/mti-sead3/sead3-platform.c b/arch/mips/mti-sead3/sead3-platform.c
deleted file mode 100644
index 5c1f42a..0000000
--- a/arch/mips/mti-sead3/sead3-platform.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
- */
-#include <linux/dma-mapping.h>
-#include <linux/init.h>
-#include <linux/leds.h>
-#include <linux/platform_device.h>
-
-#define LEDFLAGS(bits, shift)		\
-	((bits << 8) | (shift << 8))
-
-#define LEDBITS(id, shift, bits)	\
-	.name = id #shift,		\
-	.flags = LEDFLAGS(bits, shift)
-
-static struct led_info led_data_info[] = {
-	{ LEDBITS("bit", 0, 1) },
-	{ LEDBITS("bit", 1, 1) },
-	{ LEDBITS("bit", 2, 1) },
-	{ LEDBITS("bit", 3, 1) },
-	{ LEDBITS("bit", 4, 1) },
-	{ LEDBITS("bit", 5, 1) },
-	{ LEDBITS("bit", 6, 1) },
-	{ LEDBITS("bit", 7, 1) },
-	{ LEDBITS("all", 0, 8) },
-};
-
-static struct led_platform_data led_data = {
-	.num_leds	= ARRAY_SIZE(led_data_info),
-	.leds		= led_data_info
-};
-
-static struct resource pled_resources[] = {
-	{
-		.start	= 0x1f000210,
-		.end	= 0x1f000217,
-		.flags	= IORESOURCE_MEM
-	}
-};
-
-static struct platform_device pled_device = {
-	.name			= "sead3::pled",
-	.id			= 0,
-	.dev			= {
-		.platform_data	= &led_data,
-	},
-	.num_resources		= ARRAY_SIZE(pled_resources),
-	.resource		= pled_resources
-};
-
-
-static struct resource fled_resources[] = {
-	{
-		.start			= 0x1f000218,
-		.end			= 0x1f00021f,
-		.flags			= IORESOURCE_MEM
-	}
-};
-
-static struct platform_device fled_device = {
-	.name			= "sead3::fled",
-	.id			= 0,
-	.dev			= {
-		.platform_data	= &led_data,
-	},
-	.num_resources		= ARRAY_SIZE(fled_resources),
-	.resource		= fled_resources
-};
-
-static struct platform_device sead3_led_device = {
-        .name   = "sead3-led",
-        .id     = -1,
-};
-
-static struct platform_device *sead3_platform_devices[] __initdata = {
-	&pled_device,
-	&fled_device,
-	&sead3_led_device,
-};
-
-static int __init sead3_platforms_device_init(void)
-{
-	return platform_add_devices(sead3_platform_devices,
-				    ARRAY_SIZE(sead3_platform_devices));
-}
-
-device_initcall(sead3_platforms_device_init);
-- 
2.9.2

[PATCH 12/20] MIPS: SEAD3: Reset via generic syscon-reboot driver & DT

[Paul Burton]

Remove the SEAD3 implementation of _machine_restart & instead make use
of the generic syscon-reboot driver probed via device tree.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

 arch/mips/boot/dts/mti/sead3.dts  | 12 ++++++++++++
 arch/mips/configs/sead3_defconfig |  3 ++-
 arch/mips/mti-sead3/sead3-reset.c |  9 ---------
 3 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts
index 563e2636..d661012 100644
--- a/arch/mips/boot/dts/mti/sead3.dts
+++ b/arch/mips/boot/dts/mti/sead3.dts
@@ -84,6 +84,18 @@
 		};
 	};
 
+	fpga_regs: system-controller@1f000000 {
+		compatible = "mti,sead3-fpga", "syscon", "simple-mfd";
+		reg = <0x1f000000 0x200>;
+
+		reboot {
+			compatible = "syscon-reboot";
+			regmap = <&fpga_regs>;
+			offset = <0x50>;
+			mask = <0x4d>;
+		};
+	};
+
 	system-controller@1f000200 {
 		compatible = "mti,sead3-cpld", "syscon", "simple-mfd";
 		reg = <0x1f000200 0x300>;
diff --git a/arch/mips/configs/sead3_defconfig b/arch/mips/configs/sead3_defconfig
index e1c6582..055af30 100644
--- a/arch/mips/configs/sead3_defconfig
+++ b/arch/mips/configs/sead3_defconfig
@@ -80,8 +80,9 @@ CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
 # CONFIG_I2C_HELPER_AUTO is not set
 CONFIG_SPI=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_SYSCON=y
 CONFIG_SENSORS_ADT7475=y
-CONFIG_MFD_SYSCON=y
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_LCD_CLASS_DEVICE=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
diff --git a/arch/mips/mti-sead3/sead3-reset.c b/arch/mips/mti-sead3/sead3-reset.c
index e6fb244..8f548f0 100644
--- a/arch/mips/mti-sead3/sead3-reset.c
+++ b/arch/mips/mti-sead3/sead3-reset.c
@@ -13,14 +13,6 @@
 #define SOFTRES_REG	0x1f000050
 #define GORESET		0x4d
 
-static void mips_machine_restart(char *command)
-{
-	unsigned int __iomem *softres_reg =
-		ioremap(SOFTRES_REG, sizeof(unsigned int));
-
-	__raw_writel(GORESET, softres_reg);
-}
-
 static void mips_machine_halt(void)
 {
 	unsigned int __iomem *softres_reg =
@@ -31,7 +23,6 @@ static void mips_machine_halt(void)
 
 static int __init mips_reboot_setup(void)
 {
-	_machine_restart = mips_machine_restart;
 	_machine_halt = mips_machine_halt;
 	pm_power_off = mips_machine_halt;
 
-- 
2.9.2

[PATCH 13/20] MIPS: SEAD3: Use generic restart-poweroff driver

[Paul Burton]

Remove the custom platform code to restart when instructed to power off,
instead relying upon the generic restart-poweroff driver probed via DT
to do the same thing.

Remove also the halt implementation, which is incorrect. The generic
MIPS version will hang the system as halt should.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

 arch/mips/boot/dts/mti/sead3.dts  |  4 ++++
 arch/mips/configs/sead3_defconfig |  1 +
 arch/mips/mti-sead3/Makefile      |  1 -
 arch/mips/mti-sead3/sead3-reset.c | 31 -------------------------------
 4 files changed, 5 insertions(+), 32 deletions(-)
 delete mode 100644 arch/mips/mti-sead3/sead3-reset.c

diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts
index d661012..ae2e3ab 100644
--- a/arch/mips/boot/dts/mti/sead3.dts
+++ b/arch/mips/boot/dts/mti/sead3.dts
@@ -94,6 +94,10 @@
 			offset = <0x50>;
 			mask = <0x4d>;
 		};
+
+		poweroff {
+			compatible = "restart-poweroff";
+		};
 	};
 
 	system-controller@1f000200 {
diff --git a/arch/mips/configs/sead3_defconfig b/arch/mips/configs/sead3_defconfig
index 055af30..ab4c465 100644
--- a/arch/mips/configs/sead3_defconfig
+++ b/arch/mips/configs/sead3_defconfig
@@ -81,6 +81,7 @@ CONFIG_I2C_CHARDEV=y
 # CONFIG_I2C_HELPER_AUTO is not set
 CONFIG_SPI=y
 CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_RESTART=y
 CONFIG_POWER_RESET_SYSCON=y
 CONFIG_SENSORS_ADT7475=y
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
diff --git a/arch/mips/mti-sead3/Makefile b/arch/mips/mti-sead3/Makefile
index 04ea002..ad722c8 100644
--- a/arch/mips/mti-sead3/Makefile
+++ b/arch/mips/mti-sead3/Makefile
@@ -13,6 +13,5 @@ obj-y += sead3-display.o
 obj-y += sead3-dtshim.o
 obj-y += sead3-init.o
 obj-y += sead3-int.o
-obj-y += sead3-reset.o
 obj-y += sead3-setup.o
 obj-y += sead3-time.o
diff --git a/arch/mips/mti-sead3/sead3-reset.c b/arch/mips/mti-sead3/sead3-reset.c
deleted file mode 100644
index 8f548f0..0000000
--- a/arch/mips/mti-sead3/sead3-reset.c
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
- */
-#include <linux/io.h>
-#include <linux/pm.h>
-
-#include <asm/reboot.h>
-
-#define SOFTRES_REG	0x1f000050
-#define GORESET		0x4d
-
-static void mips_machine_halt(void)
-{
-	unsigned int __iomem *softres_reg =
-		ioremap(SOFTRES_REG, sizeof(unsigned int));
-
-	__raw_writel(GORESET, softres_reg);
-}
-
-static int __init mips_reboot_setup(void)
-{
-	_machine_halt = mips_machine_halt;
-	pm_power_off = mips_machine_halt;
-
-	return 0;
-}
-arch_initcall(mips_reboot_setup);
-- 
2.9.2

[PATCH 17/20] dt-bindings: img-ascii-lcd: Document a binding for simple ASCII LCDs

[Paul Burton]

Add documentation for a devicetree binding for the simple ASCII LCD
displays found on development boards such as the MIPS Boston, MIPS Malta
& MIPS SEAD3 from Imagination Technologies.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

 .../devicetree/bindings/auxdisplay/img-ascii-lcd.txt    | 17 +++++++++++++++++
 MAINTAINERS                                             |  5 +++++
 2 files changed, 22 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt

diff --git a/Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt b/Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt
new file mode 100644
index 0000000..b69bb68
--- /dev/null
+++ b/Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt
@@ -0,0 +1,17 @@
+Binding for ASCII LCD displays on Imagination Technologies boards
+
+Required properties:
+- compatible : should be one of:
+    "img,boston-lcd"
+    "mti,malta-lcd"
+    "mti,sead3-lcd"
+
+Required properties for "img,boston-lcd":
+- reg : memory region locating the device registers
+
+Required properties for "mti,malta-lcd" or "mti,sead3-lcd":
+- regmap: phandle of the system controller containing the LCD registers
+- offset: offset in bytes to the LCD registers within the system controller
+
+The layout of the registers & properties of the display are determined
+from the compatible string, making this binding somewhat trivial.
diff --git a/MAINTAINERS b/MAINTAINERS
index 20bb1d0..d08cf6d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1971,6 +1971,11 @@ S:	Maintained
 F:	Documentation/hwmon/asc7621
 F:	drivers/hwmon/asc7621.c
 
+ASCII LCD DRIVER
+M:	Paul Burton <paul.burton@imgtec.com>
+S:	Maintained
+F:	Documentation/devicetree/bindings/ascii-lcd.txt
+
 ASUS NOTEBOOKS AND EEEPC ACPI/WMI EXTRAS DRIVERS
 M:	Corentin Chary <corentin.chary@gmail.com>
 L:	acpi4asus-user@lists.sourceforge.net
-- 
2.9.2

[PATCH 19/20] MIPS: SEAD3: Use img-ascii-lcd driver

[Paul Burton]

Probe the img-ascii-lcd driver using device tree in order to display a
message on the SEAD3 board's LCD display, and remove the platform code
that was formerly performing this function. This removes more platform
code and moves SEAD3 further towards being entirely DT-based.

Signed-off-by: Paul Burton <paul.burton-1AXoQHu6uovQT0dZR+AlfA@public.gmane.org>
---

 arch/mips/boot/dts/mti/sead3.dts    |  5 +++
 arch/mips/mti-sead3/Makefile        |  3 +-
 arch/mips/mti-sead3/sead3-display.c | 77 -------------------------------------
 arch/mips/mti-sead3/sead3-time.c    |  2 -
 4 files changed, 6 insertions(+), 81 deletions(-)
 delete mode 100644 arch/mips/mti-sead3/sead3-display.c

diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts
index ae2e3ab..a3d2ae1 100644
--- a/arch/mips/boot/dts/mti/sead3.dts
+++ b/arch/mips/boot/dts/mti/sead3.dts
@@ -201,6 +201,11 @@
 			mask = <0x80>;
 			label = "fled7";
 		};
+
+		lcd@200 {
+			compatible = "mti,sead3-lcd";
+			offset = <0x200>;
+		};
 	};
 
 	/* UART connected to FTDI & miniUSB socket */
diff --git a/arch/mips/mti-sead3/Makefile b/arch/mips/mti-sead3/Makefile
index cb6d620..1674b9c 100644
--- a/arch/mips/mti-sead3/Makefile
+++ b/arch/mips/mti-sead3/Makefile
@@ -8,8 +8,7 @@
 # Copyright (C) 2012 MIPS Technoligies, Inc.  All rights reserved.
 # Steven J. Hill <sjhill-8NJIiSa5LzA@public.gmane.org>
 #
-obj-y := sead3-display.o
-obj-y += sead3-dtshim.o
+obj-y := sead3-dtshim.o
 obj-y += sead3-init.o
 obj-y += sead3-int.o
 obj-y += sead3-setup.o
diff --git a/arch/mips/mti-sead3/sead3-display.c b/arch/mips/mti-sead3/sead3-display.c
deleted file mode 100644
index 9487599..0000000
--- a/arch/mips/mti-sead3/sead3-display.c
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
- */
-#include <linux/timer.h>
-#include <linux/io.h>
-#include <asm/mips-boards/generic.h>
-
-static unsigned int display_count;
-static unsigned int max_display_count;
-
-#define LCD_DISPLAY_POS_BASE		0x1f000400
-#define DISPLAY_LCDINSTRUCTION		(0*2)
-#define DISPLAY_LCDDATA			(1*2)
-#define DISPLAY_CPLDSTATUS		(2*2)
-#define DISPLAY_CPLDDATA		(3*2)
-#define LCD_SETDDRAM			0x80
-#define LCD_IR_BF			0x80
-
-const char display_string[] = "		      LINUX ON SEAD3		   ";
-
-static void scroll_display_message(unsigned long data);
-static DEFINE_TIMER(mips_scroll_timer, scroll_display_message, HZ, 0);
-
-static void lcd_wait(unsigned int __iomem *display)
-{
-	/* Wait for CPLD state machine to become idle. */
-	do { } while (__raw_readl(display + DISPLAY_CPLDSTATUS) & 1);
-
-	do {
-		__raw_readl(display + DISPLAY_LCDINSTRUCTION);
-
-		/* Wait for CPLD state machine to become idle. */
-		do { } while (__raw_readl(display + DISPLAY_CPLDSTATUS) & 1);
-	} while (__raw_readl(display + DISPLAY_CPLDDATA) & LCD_IR_BF);
-}
-
-void mips_display_message(const char *str)
-{
-	static unsigned int __iomem *display;
-	char ch;
-	int i;
-
-	if (unlikely(display == NULL))
-		display = ioremap_nocache(LCD_DISPLAY_POS_BASE,
-			(8 * sizeof(int)));
-
-	for (i = 0; i < 16; i++) {
-		if (*str)
-			ch = *str++;
-		else
-			ch = ' ';
-		lcd_wait(display);
-		__raw_writel((LCD_SETDDRAM | i),
-			(display + DISPLAY_LCDINSTRUCTION));
-		lcd_wait(display);
-		__raw_writel(ch, display + DISPLAY_LCDDATA);
-	}
-}
-
-static void scroll_display_message(unsigned long data)
-{
-	mips_display_message(&display_string[display_count++]);
-	if (display_count == max_display_count)
-		display_count = 0;
-	mod_timer(&mips_scroll_timer, jiffies + HZ);
-}
-
-void mips_scroll_message(void)
-{
-	del_timer_sync(&mips_scroll_timer);
-	max_display_count = strlen(display_string) + 1 - 16;
-	mod_timer(&mips_scroll_timer, jiffies + 1);
-}
diff --git a/arch/mips/mti-sead3/sead3-time.c b/arch/mips/mti-sead3/sead3-time.c
index a120b7a..10b0bf3 100644
--- a/arch/mips/mti-sead3/sead3-time.c
+++ b/arch/mips/mti-sead3/sead3-time.c
@@ -94,6 +94,4 @@ void __init plat_time_init(void)
 
 	pr_debug("CPU frequency %d.%02d MHz\n", (est_freq / 1000000),
 		(est_freq % 1000000) * 100 / 1000000);
-
-	mips_scroll_message();
 }
-- 
2.9.2

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Re: [PATCH 09/20] SEAD3: Probe parallel flash via DT

[Sergei Shtylyov]

Hello.

On 08/09/2016 03:35 PM, Paul Burton wrote:

> Probe the system parallel flash using device tree rather than platform
> code, in order to reduce the amount of the latter.
>
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> ---
>
>  arch/mips/boot/dts/mti/sead3.dts     | 17 +++++++++++++++++
>  arch/mips/mti-sead3/sead3-platform.c | 37 ------------------------------------
>  2 files changed, 17 insertions(+), 37 deletions(-)
>
> diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts
> index 66f7947..7799826 100644
> --- a/arch/mips/boot/dts/mti/sead3.dts
> +++ b/arch/mips/boot/dts/mti/sead3.dts
> @@ -67,6 +67,23 @@
>  		interrupts = <0>; /* GIC 0 or CPU 6 */
>  	};
>
> +	pflash@1c000000 {

    What's "pflash"? I'd suggest to just name the ndoe "flash@..." to be more 
in line with ePAPR.

> +		compatible = "intel,28f128j3", "cfi-flash";
> +		reg = <0x1c000000 0x2000000>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +
> +		user-fs@0 {
> +			label = "User FS";
> +			reg = <0x0 0x1fc0000>;
> +		};
> +
> +		board-config@3e0000 {
> +			label = "Board Config";
> +			reg = <0x1fc0000 0x40000>;
> +		};

    Doesn't MTD code complain that the partitions are not subnodes of a 
"partitions" node?
It's the preferred way now...

> +	};
> +
>  	/* UART connected to FTDI & miniUSB socket */
>  	uart0: uart@1f000900 {
>  		compatible = "ns16550a";
[...]

MBR, Sergei

Re: [PATCH 02/20] MIPS: SEAD3: Probe interrupt controllers using DT

[kbuild test robot]

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Hi Paul,

[auto build test ERROR on linus/master]
[also build test ERROR on v4.8-rc1 next-20160809]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Paul-Burton/MIPS-SEAD3-device-tree-conversion/20160809-204707
config: mips-sead3_defconfig (attached as .config)
compiler: mipsel-linux-gnu-gcc (Debian 5.4.0-6) 5.4.0 20160609
reproduce:
        wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        make.cross ARCH=mips 

All errors (new ones prefixed by >>):

   arch/mips/mti-sead3/sead3-dtshim.c: In function 'remove_gic':
>> arch/mips/mti-sead3/sead3-dtshim.c:55:11: error: 'EINVAL' undeclared (first use in this function)
      return -EINVAL;
              ^
   arch/mips/mti-sead3/sead3-dtshim.c:55:11: note: each undeclared identifier is reported only once for each function it appears in
--
   arch/mips/mti-sead3/sead3-platform.c: In function 'sead3_platforms_device_init':
>> arch/mips/mti-sead3/sead3-platform.c:215:2: error: expected ';' before 'else'
     else
     ^

vim +/EINVAL +55 arch/mips/mti-sead3/sead3-dtshim.c

    49			return cpu_off;
    50		}
    51	
    52		cpu_phandle = fdt_get_phandle(fdt, cpu_off);
    53		if (!cpu_phandle) {
    54			pr_err("unable to get CPU intc phandle\n");
  > 55			return -EINVAL;
    56		}
    57	
    58		err = fdt_setprop_u32(fdt, 0, "interrupt-parent", cpu_phandle);

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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Re: [PATCH 03/20] MIPS: SEAD3: Probe UARTs using DT

[kbuild test robot]

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Hi Paul,

[auto build test ERROR on linus/master]
[also build test ERROR on v4.8-rc1 next-20160809]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Paul-Burton/MIPS-SEAD3-device-tree-conversion/20160809-204707
config: mips-sead3_defconfig (attached as .config)
compiler: mipsel-linux-gnu-gcc (Debian 5.4.0-6) 5.4.0 20160609
reproduce:
        wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        make.cross ARCH=mips 

Note: the linux-review/Paul-Burton/MIPS-SEAD3-device-tree-conversion/20160809-204707 HEAD 0eed2040422cad5cd9998891bc53368a6f15871c builds fine.
      It only hurts bisectibility.

All errors (new ones prefixed by >>):

   arch/mips/mti-sead3/sead3-dtshim.c: In function 'remove_gic':
   arch/mips/mti-sead3/sead3-dtshim.c:56:11: error: 'EINVAL' undeclared (first use in this function)
      return -EINVAL;
              ^
   arch/mips/mti-sead3/sead3-dtshim.c:56:11: note: each undeclared identifier is reported only once for each function it appears in
   arch/mips/mti-sead3/sead3-dtshim.c: In function 'serial_config':
>> arch/mips/mti-sead3/sead3-dtshim.c:94:13: error: implicit declaration of function 'fw_getenv' [-Werror=implicit-function-declaration]
     yamontty = fw_getenv("yamontty");
                ^
   arch/mips/mti-sead3/sead3-dtshim.c:94:11: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
     yamontty = fw_getenv("yamontty");
              ^
   arch/mips/mti-sead3/sead3-dtshim.c:110:11: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
     mode_var = fw_getenv(mode_var_name);
              ^
   cc1: some warnings being treated as errors

vim +/fw_getenv +94 arch/mips/mti-sead3/sead3-dtshim.c

    88		const char *yamontty, *mode_var;
    89		char mode_var_name[9], path[18], parity;
    90		unsigned int uart, baud, stop_bits;
    91		bool hw_flow;
    92		int chosen_off, err;
    93	
  > 94		yamontty = fw_getenv("yamontty");
    95		if (!yamontty || !strcmp(yamontty, "tty0")) {
    96			uart = 0;
    97		} else if (!strcmp(yamontty, "tty1")) {

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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Re: [PATCH 03/20] MIPS: SEAD3: Probe UARTs using DT

[kbuild test robot]

[-- Attachment #1: Type: text/plain, Size: 2473 bytes --]

Hi Paul,

[auto build test ERROR on linus/master]
[also build test ERROR on v4.8-rc1 next-20160809]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Paul-Burton/MIPS-SEAD3-device-tree-conversion/20160809-204707
config: mips-sead3_defconfig (attached as .config)
compiler: mipsel-linux-gnu-gcc (Debian 5.4.0-6) 5.4.0 20160609
reproduce:
        wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        make.cross ARCH=mips 

Note: the linux-review/Paul-Burton/MIPS-SEAD3-device-tree-conversion/20160809-204707 HEAD 0eed2040422cad5cd9998891bc53368a6f15871c builds fine.
      It only hurts bisectibility.

All errors (new ones prefixed by >>):

   arch/mips/mti-sead3/sead3-dtshim.c: In function 'remove_gic':
   arch/mips/mti-sead3/sead3-dtshim.c:56:11: error: 'EINVAL' undeclared (first use in this function)
      return -EINVAL;
              ^
   arch/mips/mti-sead3/sead3-dtshim.c:56:11: note: each undeclared identifier is reported only once for each function it appears in
   arch/mips/mti-sead3/sead3-dtshim.c: In function 'serial_config':
   arch/mips/mti-sead3/sead3-dtshim.c:94:13: error: implicit declaration of function 'fw_getenv' [-Werror=implicit-function-declaration]
     yamontty = fw_getenv("yamontty");
                ^
>> arch/mips/mti-sead3/sead3-dtshim.c:94:11: error: assignment makes pointer from integer without a cast [-Werror=int-conversion]
     yamontty = fw_getenv("yamontty");
              ^
   arch/mips/mti-sead3/sead3-dtshim.c:110:11: error: assignment makes pointer from integer without a cast [-Werror=int-conversion]
     mode_var = fw_getenv(mode_var_name);
              ^
   cc1: all warnings being treated as errors

vim +94 arch/mips/mti-sead3/sead3-dtshim.c

    88		const char *yamontty, *mode_var;
    89		char mode_var_name[9], path[18], parity;
    90		unsigned int uart, baud, stop_bits;
    91		bool hw_flow;
    92		int chosen_off, err;
    93	
  > 94		yamontty = fw_getenv("yamontty");
    95		if (!yamontty || !strcmp(yamontty, "tty0")) {
    96			uart = 0;
    97		} else if (!strcmp(yamontty, "tty1")) {

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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Re: [PATCH 17/20] dt-bindings: img-ascii-lcd: Document a binding for simple ASCII LCDs

[Rob Herring]

On Tue, Aug 09, 2016 at 01:35:42PM +0100, Paul Burton wrote:
> Add documentation for a devicetree binding for the simple ASCII LCD
> displays found on development boards such as the MIPS Boston, MIPS Malta
> & MIPS SEAD3 from Imagination Technologies.
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> ---
> 
>  .../devicetree/bindings/auxdisplay/img-ascii-lcd.txt    | 17 +++++++++++++++++
>  MAINTAINERS                                             |  5 +++++
>  2 files changed, 22 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt
> 
> diff --git a/Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt b/Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt
> new file mode 100644
> index 0000000..b69bb68
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt
> @@ -0,0 +1,17 @@
> +Binding for ASCII LCD displays on Imagination Technologies boards
> +
> +Required properties:
> +- compatible : should be one of:
> +    "img,boston-lcd"
> +    "mti,malta-lcd"
> +    "mti,sead3-lcd"
> +
> +Required properties for "img,boston-lcd":
> +- reg : memory region locating the device registers
> +
> +Required properties for "mti,malta-lcd" or "mti,sead3-lcd":
> +- regmap: phandle of the system controller containing the LCD registers
> +- offset: offset in bytes to the LCD registers within the system controller
> +
> +The layout of the registers & properties of the display are determined
> +from the compatible string, making this binding somewhat trivial.
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 20bb1d0..d08cf6d 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1971,6 +1971,11 @@ S:	Maintained
>  F:	Documentation/hwmon/asc7621
>  F:	drivers/hwmon/asc7621.c
>  
> +ASCII LCD DRIVER
> +M:	Paul Burton <paul.burton@imgtec.com>
> +S:	Maintained
> +F:	Documentation/devicetree/bindings/ascii-lcd.txt

Wrong path and filename.

> +
>  ASUS NOTEBOOKS AND EEEPC ACPI/WMI EXTRAS DRIVERS
>  M:	Corentin Chary <corentin.chary@gmail.com>
>  L:	acpi4asus-user@lists.sourceforge.net
> -- 
> 2.9.2
>