From: Lina Iyer <lina.iyer@linaro.org>
To: Sudeep Holla <sudeep.holla@arm.com>
Cc: linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
ulf.hansson@linaro.org, khilman@kernel.org, rjw@rjwysocki.net,
andy.gross@linaro.org, sboyd@codeaurora.org,
linux-arm-msm@vger.kernel.org,
Axel Haslam <ahaslam+renesas@baylibre.com>,
devicetree@vger.kernel.org,
Marc Titinger <mtitinger+renesas@baylibre.com>,
Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
Brendan Jackman <Brendan.Jackman@arm.com>,
Juri Lelli <Juri.Lelli@arm.com>
Subject: Re: [PATCH v3 02/15] dt/bindings: Update binding for PM domain idle states
Date: Mon, 15 Aug 2016 16:40:14 -0600 [thread overview]
Message-ID: <20160815224014.GF1401@linaro.org> (raw)
In-Reply-To: <2033f384-7ea3-6713-4def-80bf4251fd67@arm.com>
On Mon, Aug 15 2016 at 10:14 -0600, Sudeep Holla wrote:
>
>
>On 15/08/16 17:08, Lina Iyer wrote:
>>On Fri, Aug 12 2016 at 04:08 -0600, Sudeep Holla wrote:
>>>
>>>
>>>On 11/08/16 22:10, Lina Iyer wrote:
>>>>On Wed, Aug 10 2016 at 12:09 -0600, Sudeep Holla wrote:
>>>>>
>>>
>>>[...]
>>>
>>>>>cluster0
>>>>> CLUSTER_RET(Retention)
>>>>> CLUSTER_PG(Power Gate)
>>>>> core0
>>>>> CORE_RET
>>>>> CORE_PG
>>>>> core1
>>>>> CORE_RET
>>>>> CORE_PG
>>>>>
>>>>>cluster1
>>>>> CLUSTER_RET
>>>>> CLUSTER_PG
>>>>> core0
>>>>> CORE_RET
>>>>> CORE_PG
>>>>> core1
>>>>> CORE_RET
>>>>> CORE_PG
>>>>>
>>>>>Platform Co-ordinate supports the following states and we should be
>>>>>able to determine that from the binding:
>>>>>
>>>>>CORE_RET
>>>>>CORE_PG
>>>>>CORE_RET + CLUSTER_RET
>>>>
>>>>The problem that we have to sove here is knowing that CORE_RET +
>>>>CLUSTER_PG (hypothetically) an invalid combination. Kevin and
>>>>I debated it in the earlier RFC and we dont have a good way to solve
>>>>this generically for all devices.
>>>>
>>>
>>>Yes, I agree it's complex. But that needs to be solved IMO.
>>>
>>>I can think of 2 possible solutions:
>>>
>>>1. Index the states(which people have not liked, but as along as we
>>> don't use it in the code as it for any other purpose, it should be
>>> fine) and then have each state mentioning what parent state can be
>>> entered at this child state(i.e. starting index and all states below
>>> it)
>>>
>>This is how QCOM solved it downstream.
>>
>
>Yes even ACPI has indices to solve this.
>
>>>2. Something similar to (1) but without index instead phandles.
>>>
>>
>>The problem is when you have non-CPU devices in the device tree and
>>since they do not have a way to represent states like CPU, we did not
>>have a clear path to that. Hence we punted that to later. Whatever we
>>do, we should solve it for a generic PM domain, not just CPU domains.
>>
>
>Yes bindings defined here should be applicable for devices to, but only
>CPU's will have this hierarchy while the devices need not bother about
>hierarchy. However the parent power domain can ever the state which is
>least common denominator of all it's children power domain. That's my
>understanding. No ?
>
That is correct. But say if all the CPUs choose CORE_RET + CLUSTER_PG,
which is invalid and the firmware has to ignore it and does CORE_RET +
CLUSTER_RET instead, then Linux may have an inconsistent view of the
state selection.
Thanks,
Lina
>--
>Regards,
>Sudeep
next prev parent reply other threads:[~2016-08-15 22:40 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1470351902-43103-1-git-send-email-lina.iyer@linaro.org>
2016-08-04 23:04 ` [PATCH v3 02/15] dt/bindings: Update binding for PM domain idle states Lina Iyer
2016-08-09 23:55 ` Rob Herring
2016-08-10 15:14 ` Sudeep Holla
2016-08-10 16:40 ` Lina Iyer
[not found] ` <20160810164034.GA1401-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-08-10 18:09 ` Sudeep Holla
2016-08-10 18:13 ` Sudeep Holla
[not found] ` <5e59874c-bbb7-270a-199c-da1ff5932554-5wv7dgnIgG8@public.gmane.org>
2016-08-11 21:10 ` Lina Iyer
[not found] ` <20160811211023.GC1401-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-08-12 9:47 ` Brendan Jackman
2016-08-12 10:08 ` Sudeep Holla
2016-08-15 16:08 ` Lina Iyer
2016-08-15 16:14 ` Sudeep Holla
2016-08-15 22:40 ` Lina Iyer [this message]
[not found] ` <20160815224014.GF1401-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-08-16 8:34 ` Brendan Jackman
2016-08-16 8:41 ` Brendan Jackman
2016-08-16 9:19 ` Sudeep Holla
2016-08-12 12:35 ` Brendan Jackman
2016-08-15 16:06 ` Lina Iyer
2016-08-19 18:10 ` Kevin Hilman
2016-08-24 14:07 ` Sudeep Holla
[not found] ` <1470351902-43103-3-git-send-email-lina.iyer-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-08-24 13:48 ` [RFC 0/6] Illustration of using domain-idle-states for CPU " Brendan Jackman
2016-08-24 13:48 ` [RFC 1/6] cpuidle: Rename cpuidle_get_{cpu->dev}_driver Brendan Jackman
2016-08-24 13:48 ` [RFC 2/6] cpuidle: Add public funcion to get driver from CPU index Brendan Jackman
[not found] ` <20160824134822.3591-1-brendan.jackman-5wv7dgnIgG8@public.gmane.org>
2016-08-24 13:48 ` [RFC 3/6] cpuidle: Add device_node pointer in cpuidle_state Brendan Jackman
2016-08-24 13:48 ` [RFC 6/6] arm64: dts: Add domain-idle-states for Juno r0 power domains Brendan Jackman
2016-08-24 13:48 ` [RFC 4/6] cpuidle: dt: Add support for reading states from " Brendan Jackman
2016-08-24 13:48 ` [RFC 5/6] arm64: dts: Add Juno r0 CPU power domain tree Brendan Jackman
2016-08-04 23:05 ` [PATCH v3 14/15] ARM64: dts: Add PSCI cpuidle support for MSM8916 Lina Iyer
[not found] ` <1470351902-43103-1-git-send-email-lina.iyer-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-08-04 23:05 ` [PATCH v3 15/15] ARM64: dts: Define CPU power domain " Lina Iyer
2016-08-10 15:27 ` Sudeep Holla
2016-08-10 17:35 ` Lina Iyer
2016-08-11 9:30 ` Sudeep Holla
[not found] ` <1470351902-43103-14-git-send-email-lina.iyer@linaro.org>
2016-08-05 14:44 ` [PATCH v3 13/15] dt/bindings: Add PSCI OS-Initiated PM Domains bindings Lina Iyer
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