From: Alan Tull <atull@opensource.altera.com>
To: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
Moritz Fischer <moritz.fischer@ettus.com>,
delicious.quinoa@gmail.com,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Alan Tull <atull@opensource.altera.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Josh Cartwright <joshc@ni.com>,
Michal Simek <michal.simek@xilinx.com>,
linux-kernel@vger.kernel.org,
Cyril Chemparathy <cyril.chemparathy@xilinx.com>,
devicetree@vger.kernel.org,
Dinh Nguyen <dinguyen@opensource.altera.com>,
Jon Masters <jcm@redhat.com>,
Matthew Gerlach <mgerlach@opensource.altera.com>,
Frank Rowand <frowand.list@gmail.com>,
Walter Goossens <waltergoossens@home.nl>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v19 07/12] fpga: add fpga image information struct for zynq support
Date: Wed, 28 Sep 2016 13:21:55 -0500 [thread overview]
Message-ID: <20160928182200.15800-8-atull@opensource.altera.com> (raw)
In-Reply-To: <20160928182200.15800-1-atull@opensource.altera.com>
Minor changes to the Xilinx Zynq FPGA Manager support driver
due to FPGA Manager framework API changes for the new fpga
image information struct.
Signed-off-by: Alan Tull <atull@opensource.altera.com>
---
v19: Added in v19 of this patchset
---
drivers/fpga/zynq-fpga.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/fpga/zynq-fpga.c b/drivers/fpga/zynq-fpga.c
index c2fb412..249682e 100644
--- a/drivers/fpga/zynq-fpga.c
+++ b/drivers/fpga/zynq-fpga.c
@@ -175,7 +175,8 @@ static irqreturn_t zynq_fpga_isr(int irq, void *data)
return IRQ_HANDLED;
}
-static int zynq_fpga_ops_write_init(struct fpga_manager *mgr, u32 flags,
+static int zynq_fpga_ops_write_init(struct fpga_manager *mgr,
+ struct fpga_image_info *info,
const char *buf, size_t count)
{
struct zynq_fpga_priv *priv;
@@ -189,7 +190,7 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr, u32 flags,
return err;
/* don't globally reset PL if we're doing partial reconfig */
- if (!(flags & FPGA_MGR_PARTIAL_RECONFIG)) {
+ if (!(info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
/* assert AXI interface resets */
regmap_write(priv->slcr, SLCR_FPGA_RST_CTRL_OFFSET,
FPGA_RST_ALL_MASK);
@@ -343,7 +344,8 @@ out_free:
return err;
}
-static int zynq_fpga_ops_write_complete(struct fpga_manager *mgr, u32 flags)
+static int zynq_fpga_ops_write_complete(struct fpga_manager *mgr,
+ struct fpga_image_info *info)
{
struct zynq_fpga_priv *priv = mgr->priv;
int err;
@@ -364,7 +366,7 @@ static int zynq_fpga_ops_write_complete(struct fpga_manager *mgr, u32 flags)
return err;
/* for the partial reconfig case we didn't touch the level shifters */
- if (!(flags & FPGA_MGR_PARTIAL_RECONFIG)) {
+ if (!(info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
/* enable level shifters from PL to PS */
regmap_write(priv->slcr, SLCR_LVL_SHFTR_EN_OFFSET,
LVL_SHFTR_ENABLE_PL_TO_PS);
--
2.9.3
next prev parent reply other threads:[~2016-09-28 18:21 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-28 18:21 [PATCH v19 00/12] Device Tree support for FPGA Programming Alan Tull
2016-09-28 18:21 ` [PATCH v19 01/12] fpga: add bindings document for fpga region Alan Tull
[not found] ` <20160928182200.15800-2-atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2016-10-08 20:49 ` Rob Herring
2016-10-11 19:31 ` atull
2016-09-28 18:21 ` [PATCH v19 02/12] doc: fpga-mgr: add fpga image info to api Alan Tull
2016-09-28 18:21 ` [PATCH v19 04/12] add sysfs document for fpga bridge class Alan Tull
[not found] ` <20160928182200.15800-5-atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2016-09-29 21:54 ` Moritz Fischer
2016-09-28 18:21 ` [PATCH v19 05/12] fpga-mgr: add fpga image information struct Alan Tull
[not found] ` <20160928182200.15800-6-atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2016-09-28 23:41 ` Moritz Fischer
2016-09-29 4:34 ` Alan Tull
2016-09-29 17:43 ` Michal Simek
2016-09-28 18:21 ` [PATCH v19 06/12] fpga: add fpga image information struct for socfpga support Alan Tull
2016-09-28 18:21 ` Alan Tull [this message]
[not found] ` <20160928182200.15800-1-atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2016-09-28 18:21 ` [PATCH v19 03/12] add bindings document for altera freeze bridge Alan Tull
[not found] ` <20160928182200.15800-4-atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2016-10-08 20:49 ` Rob Herring
2016-10-10 18:45 ` atull
2016-09-28 18:21 ` [PATCH v19 08/12] fpga: add fpga bridge framework Alan Tull
2016-09-28 18:21 ` [PATCH v19 09/12] fpga: fpga-region: device tree control for FPGA Alan Tull
2016-09-28 18:21 ` [PATCH v19 10/12] ARM: socfpga: fpga bridge driver support Alan Tull
2016-09-28 18:21 ` [PATCH v19 11/12] fpga: add altera freeze bridge support Alan Tull
2016-09-28 18:22 ` [PATCH v19 12/12] fpga-manager: Add Socfpga Arria10 support Alan Tull
[not found] ` <20160928182200.15800-13-atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2016-09-29 16:49 ` Moritz Fischer
2016-09-29 21:35 ` atull
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