From: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Andrew Jeffery <andrew-zrmu5oMJ5Fs@public.gmane.org>
Cc: Linus Walleij
<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Joel Stanley <joel-U3u1mxZcP9KHXe+LvDLADg@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
openbmc-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
Timothy Pearson
<tpearson-z0qzliK6Om0mgXJStvpl+vpXobYPEAuW@public.gmane.org>
Subject: Re: [PATCH 7/8] pinctrl: aspeed-g4: Add mux configuration for all pins
Date: Mon, 3 Oct 2016 14:08:33 -0500 [thread overview]
Message-ID: <20161003190833.GA3065@rob-hp-laptop> (raw)
In-Reply-To: <e0d8fa6cd444972e6f048f98da98f0439e6ca39b.1474986045.git-series.andrew-zrmu5oMJ5Fs@public.gmane.org>
On Wed, Sep 28, 2016 at 12:20:19AM +0930, Andrew Jeffery wrote:
> The patch introducing the g4 pinctrl driver implemented a smattering of
> pins to flesh out the implementation of the core and provide bare-bones
> support for some OpenPOWER platforms. Now, update the bindings document
> to reflect the complete functionality and implement the necessary pin
> configuration tables in the driver.
We prefer bindings to be complete if possible where as drivers can be
expanded over time.
>
> Cc: Timothy Pearson <tpearson-z0qzliK6Om0mgXJStvpl+vpXobYPEAuW@public.gmane.org>
> Signed-off-by: Andrew Jeffery <andrew-zrmu5oMJ5Fs@public.gmane.org>
> ---
> Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt | 19 +-
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c | 1094 ++++++-
> 2 files changed, 1093 insertions(+), 20 deletions(-)
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next prev parent reply other threads:[~2016-10-03 19:08 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-27 14:50 [PATCH 0/8] pinctrl: aspeed: Fixes for core and g5, implement remaining pins Andrew Jeffery
2016-09-27 14:50 ` [PATCH 2/8] pinctrl: aspeed-g5: Fix names of GPID2 pins Andrew Jeffery
[not found] ` <69eda17c16684f4212a9f3e64d9587abfcc7ae74.1474986045.git-series.andrew-zrmu5oMJ5Fs@public.gmane.org>
2016-09-29 0:54 ` Joel Stanley
2016-10-10 7:56 ` Linus Walleij
2016-09-27 14:50 ` [PATCH 3/8] pinctrl: aspeed-g5: Fix GPIOE1 typo Andrew Jeffery
2016-09-29 0:54 ` Joel Stanley
2016-10-10 7:57 ` Linus Walleij
2016-09-27 14:50 ` [PATCH 5/8] pinctrl: aspeed: Enable capture of off-SCU pinmux state Andrew Jeffery
[not found] ` <a266046d34009e6e92c4c76699c550c2ba44bd5c.1474986045.git-series.andrew-zrmu5oMJ5Fs@public.gmane.org>
2016-09-29 6:45 ` Joel Stanley
2016-09-29 7:54 ` Andrew Jeffery
2016-10-23 22:20 ` Linus Walleij
2016-10-24 0:29 ` Andrew Jeffery
2016-09-27 14:50 ` [PATCH 6/8] pinctrl: aspeed-g4: Capture SuperIO pinmux dependency Andrew Jeffery
[not found] ` <b5f67ba76018314d08e240f95951751896687d37.1474986045.git-series.andrew-zrmu5oMJ5Fs@public.gmane.org>
2016-10-20 11:53 ` Linus Walleij
2016-10-21 0:33 ` Andrew Jeffery
[not found] ` <1477010011.8917.20.camel-zrmu5oMJ5Fs@public.gmane.org>
2016-10-23 22:09 ` Linus Walleij
[not found] ` <CACRpkdYZPcjGuRKVL6qwof1p7ZXT4EvwzAuz59oTgp9Z5Dzixw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-10-24 0:30 ` Andrew Jeffery
2016-09-27 14:50 ` [PATCH 7/8] pinctrl: aspeed-g4: Add mux configuration for all pins Andrew Jeffery
2016-09-29 0:54 ` Joel Stanley
[not found] ` <e0d8fa6cd444972e6f048f98da98f0439e6ca39b.1474986045.git-series.andrew-zrmu5oMJ5Fs@public.gmane.org>
2016-10-03 19:08 ` Rob Herring [this message]
2016-10-04 1:02 ` Andrew Jeffery
2016-09-27 14:50 ` [PATCH 8/8] pinctrl: aspeed-g5: " Andrew Jeffery
2016-09-29 0:54 ` Joel Stanley
2016-10-10 0:53 ` Rob Herring
[not found] ` <cover.115463f791b69859c5ce9dafd61a5755ea039f4b.1474986045.git-series.andrew-zrmu5oMJ5Fs@public.gmane.org>
2016-09-27 14:50 ` [PATCH 1/8] pinctrl: aspeed: "Not enabled" is a significant mux state Andrew Jeffery
2016-09-29 0:54 ` Joel Stanley
2016-10-10 7:55 ` Linus Walleij
2016-09-27 14:50 ` [PATCH 4/8] pinctrl: aspeed-g5: Fix pin association of SPI1 function Andrew Jeffery
[not found] ` <bdd34f8c4bfabbc1d3cd05a66ac8734da514b1e5.1474986045.git-series.andrew-zrmu5oMJ5Fs@public.gmane.org>
2016-09-29 0:54 ` Joel Stanley
2016-10-03 18:57 ` Rob Herring
2016-10-10 7:59 ` Linus Walleij
2016-10-10 7:59 ` [PATCH 0/8] pinctrl: aspeed: Fixes for core and g5, implement remaining pins Linus Walleij
2016-10-10 23:27 ` Andrew Jeffery
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