From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gary Bisson Subject: [PATCH 3/5] ARM: dts: imx6qdl-sabrelite: add missing USB PHY reset control Date: Tue, 25 Oct 2016 23:19:53 +0200 Message-ID: <20161025211955.5345-4-gary.bisson@boundarydevices.com> References: <20161025211955.5345-1-gary.bisson@boundarydevices.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20161025211955.5345-1-gary.bisson@boundarydevices.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: devicetree@vger.kernel.org Cc: fabio.estevam@freescale.com, linux@arm.linux.org.uk, Gary Bisson , robh+dt@kernel.org, kernel@pengutronix.de, shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org Declared as a regulator since the driver doesn't have a reset-gpios property for this. This ensures that the PHY is woken up, not depending on the state the second stage bootloader leaves the pin. Signed-off-by: Gary Bisson --- arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi index cebea8a..bf00267 100644 --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi @@ -94,6 +94,19 @@ pinctrl-0 = <&pinctrl_can_xcvr>; gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; }; + + reg_usb_h1_vbus: regulator@4 { + compatible = "regulator-fixed"; + reg = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1>; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; }; gpio-keys { @@ -481,6 +494,12 @@ >; }; + pinctrl_usbh1: usbh1grp { + fsl,pins = < + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x030b0 + >; + }; + pinctrl_usbotg: usbotggrp { fsl,pins = < MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 @@ -578,6 +597,7 @@ }; &usbh1 { + vbus-supply = <®_usb_h1_vbus>; status = "okay"; }; -- 2.9.3