From: Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
To: Dmitry Torokhov
<dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Rajat Jain <rajatja-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>,
linux-wireless-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Xinming Hu <huxm-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
Amitkumar Karwar
<akarwar-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
Brian Norris
<briannorris-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>,
Kalle Valo <kvalo-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Rajat Jain <rajatxjain-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Subject: Re: [PATCH v6] mwifiex: parse device tree node for PCIe
Date: Wed, 26 Oct 2016 14:08:06 -0700 [thread overview]
Message-ID: <20161026210805.GA14423@localhost> (raw)
In-Reply-To: <20161026210648.GE3989@dtor-ws>
On Wed, Oct 26, 2016 at 02:06:48PM -0700, Dmitry Torokhov wrote:
> On Wed, Oct 26, 2016 at 01:56:34PM -0700, Brian Norris wrote:
> > On Wed, Oct 26, 2016 at 01:51:48PM -0700, Rajat Jain wrote:
> > > On Wed, Oct 26, 2016 at 1:46 PM, Dmitry Torokhov
> > > <dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> > > On Wed, Oct 26, 2016 at 01:17:36PM -0700, Brian Norris wrote:
> > > Sorry, I just saw this... Why do we need devicetree data for
> > > discoverable bus (PCI)? How does the driver work on systems that do not
> > > use DT? Why do we need them to behave differently?
> > >
> > > There are a couple of out-of-band GPIO pins from Marvell chip that can
> > > serve as wake-up pins (wake up the CPU when asserted). The Marvell chip
> > > has to be told which GPIO pin is to be used as the wake-up pin. The pin to
> > > be used is system / platform dependent. (On some systems it could be
> > > GPIO13, on others it could be GPIO14 etc depending on how the marvell chip
> > > is wired up to the CPU).
>
> So wakeup pin is not wired to PCIe WAKE?
Not in our case.
> > There's also calibration data. See "marvell,caldata*" and
> > "marvell,wakeup-pin" properties. Currently only for SDIO, in
> > Documentation/devicetree/bindings/net/wireless/marvell-sd8xxx.txt, but
> > we're adding support for PCIe.
>
> How would it all work if I moved the PCIe module from one device to
> another?
These boards are soldered down, at least in the case I care about.
Brian
next prev parent reply other threads:[~2016-10-26 21:08 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-29 16:39 [PATCH RESEND v3] mwifiex: parse device tree node for PCIe Amitkumar Karwar
[not found] ` <1475167183-18376-1-git-send-email-akarwar-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
2016-09-29 16:54 ` Rajat Jain
2016-10-04 13:34 ` Rob Herring
2016-10-05 19:48 ` Brian Norris
2016-10-21 0:30 ` [PATCH v4] " Rajat Jain
[not found] ` <1477009812-95032-1-git-send-email-rajatja-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
2016-10-21 2:06 ` Brian Norris
2016-10-21 17:15 ` [PATCH v5] " Rajat Jain
[not found] ` <1477070156-109965-1-git-send-email-rajatja-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
2016-10-21 21:21 ` [PATCH v6] " Rajat Jain
[not found] ` <1477084869-15612-1-git-send-email-rajatja-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
2016-10-26 20:17 ` Brian Norris
2016-10-26 20:46 ` Dmitry Torokhov
2016-10-26 20:51 ` Rajat Jain
[not found] ` <CACK8Z6H1ACBo7nDxaXR3Vn9cPdyRqxxzdgYz7vNmojiSvjbW5A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-10-26 20:56 ` Brian Norris
2016-10-26 21:06 ` Dmitry Torokhov
2016-10-26 21:08 ` Brian Norris [this message]
2016-10-26 21:12 ` Rajat Jain
2016-10-26 21:16 ` Rajat Jain
2016-10-30 20:41 ` Rob Herring
2016-10-31 17:09 ` Rajat Jain
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